gnuradio / gr-verilogLinks
☆18Updated 2 years ago
Alternatives and similar repositories for gr-verilog
Users that are interested in gr-verilog are comparing it to the libraries listed below
Sorting:
- LiteX Accelerator Block for GNU Radio☆24Updated 3 years ago
- This is an OOT module for GNU Radio integrating verilog simulation feature☆38Updated 6 years ago
- Open source FPGA cores for digital signal processing (push mirror from gitlab.com/theseus-cores/theseus-cores)☆16Updated 4 years ago
- OscillatorIMP ecosystem for the digital characterization of ultrastable oscillators and Software Defined Radio (SDR) frontend processing☆58Updated last month
- Small footprint and configurable Inter-Chip communication cores☆65Updated 2 weeks ago
- This repository contains iCEBreaker examples for Amaranth HDL.☆39Updated 2 years ago
- 🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.☆31Updated 3 years ago
- A basic Soft(Gate)ware Defined Radio architecture☆97Updated last year
- ADI Scripts for Linux images☆28Updated 3 months ago
- a noodly Amaranth HDL-wrapper for FPGA SerDes' presenting a PIPE PHY interface☆31Updated 3 years ago
- Digital FM Radio Receiver for FPGA☆63Updated 9 years ago
- Constraint files for Hardware Description Language (HDL) designs targeting FPGA boards☆45Updated last week
- Saturn SDR Radio: Xilinx FPGA and Raspberry Pi 4 CM☆46Updated 3 weeks ago
- VHDL PCIe Transceiver☆31Updated 5 years ago
- Small footprint and configurable JESD204B core☆49Updated 2 weeks ago
- Generic Logic Interfacing Project☆47Updated 5 years ago
- A wishbone controlled FM transmitter hack☆23Updated last year
- An all-digital GPS disciplined oscillator using MMCM phase shift.☆31Updated 3 years ago
- Prototype phase noise analyzer☆20Updated 4 years ago
- Projects published on controlpaths.com and hackster.io☆42Updated 3 years ago
- HDL code for a complex multiplier with AXI stream interface☆16Updated 2 years ago
- iCEstick iCE40-HX1K FPGA hacks ~ iCEfm FM Transmitter☆18Updated 8 years ago
- An SDR for Raspberry Pi☆35Updated 5 years ago
- Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores☆52Updated 2 years ago
- FPGA board-level debugging and reverse-engineering tool☆38Updated 2 years ago
- A collection of debugging busses developed and presented at zipcpu.com☆41Updated last year
- A reconfigurable logic circuit made of identical rotatable tiles.☆23Updated 3 years ago
- RFNoC out-of-tree module for a channelizer☆16Updated 7 years ago
- System on Chip toolkit for nMigen☆19Updated 5 years ago
- An RFSoC Frequency Planner developed using Python.☆31Updated 2 years ago