AugustinJose1221 / FPGA-BuildLinks
A novel architectural design for stitching video streams in real-time on an FPGA.
☆122Updated 3 years ago
Alternatives and similar repositories for FPGA-Build
Users that are interested in FPGA-Build are comparing it to the libraries listed below
Sorting:
- ISP-Lite, VIP, MIPI-RX IP实现,测试平台为KV260+AR1335 3MP@30fps☆95Updated 2 years ago
- 网络训练、图像预处理以及部分hend功能是基于pc端实现的,只有主干网络部署在fpga上,片上资源无法支持整个网络所需资源,建议添加外部存储及DDR☆106Updated last year
- image processing based FPGA☆106Updated 3 years ago
- The Canny Edge Detection algorithm is implemented on an FPGA using only Verilog code and no Intellectual Property, making it convenient t…☆38Updated last year
- 2022年全国大学生嵌入式芯片与系统设计竞赛——FPGA创新设计竞赛紫光同创赛道视频色度亮度提取赛题设计源文件☆32Updated 2 years ago
- 基于FPGA的图像处理模块(出自于crazybingo)(将部分IP换为纯Verilog用于跨平台移植)☆48Updated 5 years ago
- 这是我所开发的两个项目,包括ov5640-ddr3-usb2.0高速图像采集系统以及NOIP1SN1300A-ddr3-sdhc高速地表图像采集及存储系统☆89Updated 7 years ago
- FPGA☆125Updated 5 years ago
- 七路图像在FPGA中实现拼接,代码会不断添加进来。☆24Updated 3 years ago
- 帧差法运动目标检测,基于ZYNQ7020☆65Updated 3 years ago
- 【2022集创赛】Arm杯一等奖作品:Cortex-M0智能娱乐收音机 开源项目☆28Updated 2 years ago
- FPGA实现简单的图像处理算法☆47Updated 2 years ago
- 基于FPGA进行车牌识别☆76Updated last year
- 2023集创赛紫光同创杯一等奖项目☆113Updated last year
- ☆28Updated 4 years ago
- Constrast limited adaptive histogram equlization based on Verilog☆33Updated last year
- 基于verilog实现了ISP图像处理IP☆269Updated 2 years ago
- Real time face detection based on Arm Cortex-M3 DesignStart and FPGA☆200Updated last year
- ☆32Updated last year
- 代码在这个库里 Code is here☆51Updated 6 months ago
- CNN accelerator implemented with Spinal HDL☆149Updated last year
- This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…☆180Updated last year
- FPGA图像处理-- 车牌定位,包括二值化,腐蚀,膨胀,sobel边缘检测,水平投影和垂直投影等☆45Updated 2 years ago
- fpga跑sobel识别算法☆35Updated 4 years ago
- FPGA实现动态图像识别☆21Updated 4 years ago
- 帮助大家进行FPGA的入门,分享FPGA相关的优秀文章,优秀项目☆34Updated 3 years ago
- An FPGA-based MPEG2 encoder for video compression (1920x1080 120fps). 基于FPGA的MPEG2视频编码器,可实现视频压缩。☆125Updated last year
- 2023集创赛国二。基于脉动阵列写的一个简单的卷积层加速器,支持yolov3-tiny的第一层卷积层计算,可根据FPGA端DSP资源灵活调整脉动阵列的结构以实现不同的计算效率。☆177Updated 7 months ago
- FPGA图像处理仿真平台☆26Updated 3 years ago
- The Dark Channel Prior technique is implemented on FPGA using only Verilog code and no Intellectual Property, making it convenient to rep…☆38Updated 11 months ago