Alternatives and similar repositories for Kintex-7-OV13850-Verilog

Users that are interested in Kintex-7-OV13850-Verilog are comparing it to the libraries listed below

• circuitvalley / USB3_MIPI_CSI2_RX_V2_Crosslink_NX
  MIPI CSI-2 Camera Sensor Receiver V2 Verilog HDL implementation For any generic FPGA. Tested with IMX219 IMX477 on Lattice Crosslink NX w…
  ☆58Updated 5 months ago
• Frogwells / fpga_cmos_design
  这是使用FPGA开发CMOS的两个真实项目，之前的fpga_design仅是一个未完善的版本，同时也删除了一些与项目无关的东西
  ☆35Updated 7 years ago
• ganyunhan / DUAL-OV5640-for-GOWIN
  A dual-camera based on OminiVison 5460 for GoWin GW2A-55K Combat Board
  ☆33Updated 3 years ago
• cjhonlyone / ADC-lvds
  Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS
  ☆53Updated 2 years ago
• Elrori / Delta-sigma-ADC-verilog
  Delta-sigma ADC,PDM audio FPGA Implementation
  ☆72Updated 3 years ago
• FeldmeierMichael / MIPI_CSI_2
  ☆14Updated 2 years ago
• DeamonYang / FPGA_FFT
  基于FPGA的FFT
  ☆19Updated 6 years ago
• hdl-util / mipi-csi-2
  Capture images/video from a Raspberry Pi Camera (MIPI CSI-2) with an FPGA
  ☆71Updated 5 years ago
• suisuisi / FPGATechnologyGroup
  FPGA Technology Exchange Group相关文件管理
  ☆45Updated 3 months ago
• sh-vlad / FPGA_rtime_HDR_video
  We are aimed at making a device for shooting real-time HDR (High Dynamic Range) video using FPGA.
  ☆32Updated 6 years ago
• aquaxis / aq_mipi_csi2rx_ultrascaleplus
  ☆31Updated 5 years ago
• VideoGPU / MIPI_CSI2_TX
  VHDL code for using Xilnx LVDS lines for MIPI CSI-2 TX protocol. For educational purposes
  ☆71Updated 2 years ago
• VideoGPU / FMC_MIPI
  FMC card to allow interfacing Xilinx FPGA boards with Jetson TX2 or TX1 via CSI-2 camera interface
  ☆18Updated 2 years ago
• bxinquan / zynqmp_cam_isp_demo
  ISP-Lite, VIP, MIPI-RX IP实现，测试平台为KV260+AR1335 3MP@30fps
  ☆98Updated 2 years ago
• cudnn / USBtoMIPI
  - Use FPGA to implement MIPI interface; - Get command from PC through USB communication; - Decode command in FPGA
  ☆11Updated 8 years ago
• hellgate202 / csi2_rx
  MIPI CSI-2 RX
  ☆34Updated 3 years ago
• xycfwrj / zynq_axi_ddr_barebone
  minimal code to access ps DDR from PL
  ☆20Updated 5 years ago
• hdl-util / mipi-demo
  MIPI CSI-2 + MIPI CCS Demo
  ☆72Updated 4 years ago
• BigPig-Bro / Gowin
  【例程】国产高云FPGA 开发板及其工程
  ☆32Updated 10 months ago
• AugustinJose1221 / Video-Stitching
  ☆28Updated 4 years ago
• halftop / Interface-Protocol-in-Verilog
  Interface Protocol in Verilog
  ☆50Updated 6 years ago
• mhhai / ImageStitchBasedOnFPGA
  七路图像在FPGA中实现拼接，代码会不断添加进来。
  ☆25Updated 3 years ago
• ultraembedded / core_spiflash
  SPI-Flash XIP Interface (Verilog)
  ☆40Updated 3 years ago
• ApotheoTech / Aper-Oculus
  An open-source Xilinx Kria SOM Carrier for high-speed camera design
  ☆27Updated last year
• WangXuan95 / FPGA-HDMI
  An FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器
  ☆63Updated last year
• DeamonYang / FPGA_SDR
  软件无线电，使用FPGA进行正交解调。
  ☆22Updated 6 years ago
• xupsh / Digital-Design-Reference-Design
  ☆23Updated 8 years ago
• CoreyChen922 / sata3_host_controller
  It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.
  ☆73Updated last year
• suisuisi / FPGAandUSB3.0
  FPGA和USB3.0桥片实现USB3.0通信
  ☆69Updated 3 years ago
• Hamid-R-Tanhaei / ZYNQ_ADC_DMA_LWIP
  Interfacing ZYNQ SoC device with ADC, Transferring data through DMA and LwIP
  ☆49Updated 4 years ago