Alternatives and similar repositories for video-capture-and-process

Users that are interested in video-capture-and-process are comparing it to the libraries listed below

• maxs-well / LMS-sound-filtering-by-Verilog
  LMS sound filtering by Verilog
  ☆43Updated 5 years ago
• DOUDIU / Video-Stitching-on-FPGA
  This open-source repository aims to stitch several separate video streams into a single video using DDR3/4 storage via the AXI interface.…
  ☆16Updated 11 months ago
• DexWen / LMS-Adaptive-filter
  LMS-Adaptive Filter implement using verilog and Matlab
  ☆47Updated 8 years ago
• briansune / Kintex-7-OV13850-Verilog
  kintex7 ov13850 fpga mipi camera
  ☆19Updated last year
• JefferyLi0903 / MMC
  MMC小组开发的一个基于Cortex-M0的ARM处理器核的无线SOC设计
  ☆22Updated 2 years ago
• lauchinyuan / FPGA_DDR3_Ctrl
  An AXI DDR3 SDRAM controller for FPGA
  ☆39Updated last year
• TomSawyer2 / Gowin_FPGA_Clock
  TFT Clock by Gowin FPGA | 华中科技大学电信学院硬件课设基于国产高云FPGA的多功能TFT屏数字钟
  ☆10Updated 2 years ago
• mhhai / ImageStitchBasedOnFPGA
  七路图像在FPGA中实现拼接，代码会不断添加进来。
  ☆27Updated 4 years ago
• cjhonlyone / ADC-lvds
  Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS
  ☆56Updated 2 years ago
• ajackevic / ELEC5882
  The Design and Implementation of a Pulse Compression Filter on an FPGA.
  ☆30Updated 4 years ago
• suisuisi / FPGAandUSB3.0
  FPGA和USB3.0桥片实现USB3.0通信
  ☆73Updated 3 years ago
• echoPinkApple / bilinear
  Bilinear interpolation realizes image scaling based on FPGA
  ☆28Updated 5 years ago
• ganyunhan / DUAL-OV5640-for-GOWIN
  A dual-camera based on OminiVison 5460 for GoWin GW2A-55K Combat Board
  ☆33Updated 3 years ago
• AugustinJose1221 / Video-Stitching
  ☆30Updated 4 years ago
• briansune / FPGA-Camera-MIPI-DVP-Verilog
  FPGA Camera Parallel & MIPI Verilog
  ☆23Updated 2 weeks ago
• WangXuan95 / FPGA-HDMI
  An FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器
  ☆74Updated last year
• qxdn / 16QAM
  16QAM modulation and demodulation by Verilog
  ☆20Updated 4 years ago
• Floral / Pose-Detection-of-MPU6050-Based-on-FPGA
  FPGA implementation of pose detection with Kalman filter. (verilog)
  ☆35Updated 3 years ago
• suisuisi / FPGATechnologyGroup
  FPGA Technology Exchange Group相关文件管理
  ☆53Updated last month
• BigPig-Bro / udp_gmii_ov5640
  本项目为2023年全国大学生嵌入式芯片与系统设计竞赛——FPGA创新设计竞赛（高云赛道）项目，题目基于高云FPGA的多路网络视频监控编码系统。
  ☆54Updated last year
• Elrori / FMCW_Radar
  FMCW Radar verilog project
  ☆32Updated 5 years ago
• red435 / verilog_APB_SPI_interface
  SPI interface connect to APB BUS with Verilog HDL
  ☆37Updated 4 years ago
• Nitcloud / Image_sim
  基于FPGA的图像处理模块（出自于crazybingo）（将部分IP换为纯Verilog用于跨平台移植）
  ☆48Updated 5 years ago
• BigPig-Bro / Gowin
  【例程】国产高云FPGA 开发板及其工程
  ☆36Updated last year
• maxs-well / FIR_Implementation
  FIR filter implementation
  ☆27Updated 5 years ago
• cterrill26 / FPGA_AudioVisualizer
  Verilog code for an efficient and scalable DFT calculator (using the FFT algorithm). Meant to be implemented on an Intel DE10-Lite FPGA d…
  ☆16Updated 5 years ago
• txzing / modbus_crc_verilog
  FPGA纯逻辑实现modbus通信
  ☆22Updated 3 years ago
• alknvl / axis_udp
  This repository contains simple implementation of UDP/IP stack with 64-bit AXI-Stream interface. ICMP and ARP requests are partially supp…
  ☆60Updated 3 years ago
• cudnn / USBtoMIPI
  - Use FPGA to implement MIPI interface; - Get command from PC through USB communication; - Decode command in FPGA
  ☆12Updated 8 years ago
• yaseensalah / Digital-Design-of-FIR-Filter
  Hardware Design and Verification of a configurable and parametrized 50th order low-pass FIR filter starting from MATLAB Modeling to Veril…
  ☆27Updated 2 years ago