2D Systolic Array Multiplier
☆35Aug 22, 2026Updated last month
Alternatives and similar repositories for 2D-Systolic-Array-Multiplier
Users that are interested in 2D-Systolic-Array-Multiplier are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Implementation of weight stationary systolic array which has a size of 4x4(scalable) to 256X256☆31Feb 21, 2024Updated 2 years ago
- This project is focused on the design and verification of digital logic circuits, particularly targeting chip design using Verilog, Syst…☆17Jun 26, 2024Updated 2 years ago
- A 4x4 Weight Stationary Systolic Array Implementation☆15Oct 16, 2023Updated 2 years ago
- ☆10Aug 30, 2024Updated 2 years ago
- verilog实现TPU中的脉动阵列计算卷积的module☆178May 10, 2025Updated last year
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- RISC-V RV32E core designed for minimal area☆27Nov 17, 2024Updated last year
- open source hardware synthesis. SystemVerilog, VHDL and ABEL-HDL to gate-level netlists☆45Aug 25, 2026Updated last month
- JTAG Test Access Port (TAP)☆42Jul 17, 2014Updated 12 years ago
- Systolic array based simple TPU for CNN on PYNQ-Z2☆53Jun 24, 2022Updated 4 years ago
- Board definition files and initial example programs☆22Aug 7, 2021Updated 5 years ago
- tpu-systolic-array-weight-stationary☆26May 7, 2021Updated 5 years ago
- TinyTapeout submission with the SN76489 Digital Complex Sound Generator (DCSG) programmable sound generator (PSG) chip from Texas Instrum…☆64Nov 16, 2025Updated 10 months ago
- IHP 130nm ASIC tapeout of a 2x2 bfloat16 matrix matrix multiplication with DFT infrastructure. Iteration on the previous accelerator tape…☆43Jul 10, 2026Updated 3 months ago
- Yosys plugin for logic locking and supply-chain security☆25Apr 5, 2025Updated last year
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- 🤖 An automated NTU Thesis LaTeX continuous integration and continuous deploying service built up with GitHub Actions.☆10May 8, 2020Updated 6 years ago
- ☆15Jul 16, 2026Updated 2 months ago
- A parametric RTL code generator of an efficient integer MxM Systolic Array implementation for Xilinx FPGAs.☆39Aug 28, 2025Updated last year
- DDA solver for the van der Pol oscillator using 16-bit posits☆28Jan 23, 2025Updated last year
- This is a verilog implementation of 4x4 systolic array multiplier☆89Nov 2, 2020Updated 5 years ago
- Tiny ASIC implementation for "The Era of 1-bit LLMs All Large Language Models are in 1.58 Bits" matrix multiplication unit☆196Apr 19, 2024Updated 2 years ago
- Single Cycle CPU using the RV32I Base Instruction set☆24Nov 5, 2025Updated 11 months ago
- SymbiFlow WIP changes for Verilog to Routing -- Open Source CAD Flow for FPGA Research☆40Aug 21, 2024Updated 2 years ago
- ☆12Sep 18, 2024Updated 2 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆11Nov 17, 2025Updated 10 months ago
- IC implementation of Systolic Array for TPU☆376Oct 21, 2024Updated last year
- My Solutions to Nomura's GM Quant Challenge 2022☆14Jun 28, 2022Updated 4 years ago
- Reusable image processing modules in SystemVerilog☆34Aug 7, 2017Updated 9 years ago
- Minimal ZX Spectrum for Ulx3s ECP5 board☆12May 7, 2020Updated 6 years ago
- SAURIA (Systolic-Array tensor Unit for aRtificial Intelligence Acceleration) is an open-source Convolutional Neural Network accelerator b…☆124Nov 26, 2025Updated 10 months ago
- 32-Bit Algorithms of Floating Point Operations are implemented on Verilog with logic Operations.☆103Apr 30, 2019Updated 7 years ago
- Memory Compiler Tutorial☆14Aug 2, 2022Updated 4 years ago
- Working 8x8 systolic array hardware implemented in Xilinx Vivado, operated and controlled in software using Xilinx Vitis☆29Feb 16, 2024Updated 2 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- A cutting-edge AI-powered health diagnosis chatbot that leverages machine learning to interpret symptoms and predict potential medical co…☆15Mar 8, 2024Updated 2 years ago
- ☆13Apr 29, 2025Updated last year
- A social movie rating platform where users can follow each other, rate films, and share their thoughts through comments.☆13Dec 15, 2022Updated 3 years ago
- Virtual machine with a custom instruction set in C☆16Jul 17, 2018Updated 8 years ago
- ☆21Oct 11, 2025Updated last year
- A public repository discussing the PULP (Parallel Ultra Low Power) platform for open-source RISC-V processors and associated software.☆33Nov 18, 2025Updated 10 months ago
- ☆12Oct 5, 2026Updated last week