用Altera FPGA芯片自制CPU
☆42Aug 10, 2014Updated 12 years ago
Alternatives and similar repositories for azpr_cpu
Users that are interested in azpr_cpu are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- 根据最近看的一本书编写的对应RTL以及Testbench☆20Mar 12, 2017Updated 9 years ago
- llvmのAZ Processor Backend☆11Oct 29, 2013Updated 12 years ago
- 软件无线电,使用FPGA进行正交解调。☆23Feb 18, 2019Updated 7 years ago
- SPI通信实现FLASH读写☆17Mar 18, 2020Updated 6 years ago
- VHDL数字电路设计☆13Aug 30, 2017Updated 9 years ago
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- AXI DMA Check: A utility to measure DMA speeds in simulation☆16Jan 22, 2025Updated last year
- a simple new ISA nnISA and nnSOC nnCPU nnAs nnCc☆10Mar 15, 2020Updated 6 years ago
- 学习AXI接口,以及xilinx DDR3 IP使用☆40Mar 6, 2017Updated 9 years ago
- OV7670 (Verilog HDL)Drive for FPGA☆19Mar 4, 2019Updated 7 years ago
- powerpc processor prototype and an example of semiconductor startup biz plan☆14Feb 2, 2019Updated 7 years ago
- Using Nim to interface with SystemVerilog test benches via DPI-C☆32May 15, 2025Updated last year
- Made a CPU in Logisim when I was 14 (2009), and wrote a naive assembler and compiler for it in Flash. The CPU's design is inspired by Don…☆10Sep 30, 2016Updated 9 years ago
- MIAOW2.0 FPGA implementable design☆12Oct 18, 2017Updated 8 years ago
- FPGA based PDP-11 cpu☆19Jan 2, 2016Updated 10 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- System on Chip with RISCV-32 / RISCV-64 / RISCV-128☆22Aug 9, 2026Updated last month
- SystemVerilog wrapper over the Verilog Programming Interface (VPI)☆12Jun 3, 2025Updated last year
- 中科大 2017 级数字电路实验/组成原理实验的同学经验和资料分享☆12Oct 25, 2019Updated 6 years ago
- 平头哥无剑100开源SoC平台(双核E902,安全启动,BootROM,IOPMP,Mailbox,RSA-2048,SHA-2, WS2812,Flash)☆23Sep 2, 2023Updated 3 years ago
- Deep learning accelerator for convolutional layer (convolution operation) and fully-connected layer(matrix-multiplication).☆20Nov 18, 2018Updated 7 years ago
- 自建 chisel 工程模板☆16Jul 19, 2023Updated 3 years ago
- Verification of Ethernet Switch System Verilog