Alternatives and similar repositories for Verilog_Module

Users that are interested in Verilog_Module are comparing it to the libraries listed below

• aiminickwong / H264
  H264视频解码verilog实现
  ☆83Updated 8 years ago
• jdocampom / JPEG-Decoder
  Verilog Code for a JPEG Decoder
  ☆34Updated 7 years ago
• Nitcloud / Image_sim
  基于FPGA的图像处理模块（出自于crazybingo）（将部分IP换为纯Verilog用于跨平台移植）
  ☆48Updated 5 years ago
• Lianghao-Yuan / AHB_Bus_Matrix
  ☆37Updated 10 years ago
• maxs-well / USB_Ctrl
  USB2.0 Verilog
  ☆18Updated 6 years ago
• mematrix / AES-FPGA
  AES加密解密算法的Verilog实现
  ☆66Updated 9 years ago
• antmicro / nvme-verilog-pcie
  ☆78Updated 3 years ago
• Frogwells / fpga_design
  这是我所开发的两个项目，包括ov5640-ddr3-usb2.0高速图像采集系统以及NOIP1SN1300A-ddr3-sdhc高速地表图像采集及存储系统
  ☆94Updated 8 years ago
• ahmedshahein / DSP-RTL-Lib
  RTL Verilog library for various DSP modules
  ☆90Updated 3 years ago
• freecores / jpegencode
  JPEG Encoder Verilog
  ☆78Updated 2 years ago
• funannoka / SoC-Design-DDR3-Controller
  DDR3 SDRAM Memory Controller Design & Synthesis using System Verilog
  ☆31Updated 6 years ago
• ultraembedded / core_sdram_axi4
  SDRAM controller with AXI4 interface
  ☆98Updated 6 years ago
• WayneGong / Image_Rotate
  视频旋转（2019FPGA大赛）
  ☆37Updated 5 years ago
• ultraembedded / core_axi_cache
  128KB AXI cache (32-bit in, 256-bit out)
  ☆53Updated 4 years ago
• WangXuan95 / FPGA-MPEG2-encoder
  An FPGA-based MPEG2 encoder for video compression (1920x1080 120fps). 基于FPGA的MPEG2视频编码器，可实现视频压缩。
  ☆135Updated last year
• kdurant / axi-ddr3
  学习AXI接口，以及xilinx DDR3 IP使用
  ☆38Updated 8 years ago
• antmicro / openssd-nvme
  ☆30Updated 4 years ago
• ultraembedded / core_soc
  Basic Peripheral SoC (SPI, GPIO, Timer, UART)
  ☆65Updated 5 years ago
• rnz / verilog-sha256
  Implementation of the SHA256 Algorithm in Verilog
  ☆37Updated 13 years ago
• halftop / Interface-Protocol-in-Verilog
  Interface Protocol in Verilog
  ☆50Updated 6 years ago
• brown9804 / PCIe-Physical-Layer
  Implementation of the PCIe physical layer
  ☆48Updated 2 months ago
• suisuisi / FPGAandUSB3.0
  FPGA和USB3.0桥片实现USB3.0通信
  ☆72Updated 3 years ago
• Frogwells / fpga_cmos_design
  这是使用FPGA开发CMOS的两个真实项目，之前的fpga_design仅是一个未完善的版本，同时也删除了一些与项目无关的东西
  ☆35Updated 7 years ago
• fpgadeveloper / ethernet-fmc-axi-eth
  Example design for the Ethernet FMC using 4 AXI Ethernet Subsystem IP blocks
  ☆65Updated 4 months ago
• tishi43 / h265_decoder
  H265 decoder write in verilog, verified on Xilinx ZYNQ7035
  ☆76Updated 4 years ago
• raymondrc / FPGA_SM4
  FPGA implementation of Chinese SM4 encryption algorithm.
  ☆56Updated 7 years ago
• ultraembedded / core_dbg_bridge
  UART -> AXI Bridge
  ☆63Updated 4 years ago
• WangXuan95 / FPGA-Gzip-compressor
  An FPGA-based GZIP (Deflate algorithm) compressor, which inputs raw data and outputs standard GZIP format (as known as .gz file format). …
  ☆139Updated 2 years ago
• zhangkunming0216 / FIFO_-asynchronous
  异步FIFO的内部实现
  ☆24Updated 7 years ago
• 2cc2ic / DMA-S2MM-and-MM2S
  Build an open source, extremely simple DMA.
  ☆22Updated 6 years ago