andrewattwood / fuserisc
Dual RISC-V DISC with integrated eFPGA
☆16Updated 3 years ago
Alternatives and similar repositories for fuserisc:
Users that are interested in fuserisc are comparing it to the libraries listed below
- ☆16Updated 6 months ago
- ☆33Updated 2 years ago
- This repo shows an implementation of an FPGA from RTL to GDS with open Skywater-130 pdk☆30Updated 3 years ago
- VSDFLOW is an automated solution to programmers, hobbyists and small scale semiconductor technology entrepreneurs who can craft the…☆16Updated 4 years ago
- A padring generator for ASICs☆25Updated last year
- https://caravel-mgmt-soc-litex.readthedocs.io/en/latest/☆27Updated 3 months ago
- Hamming ECC Encoder and Decoder to protect memories☆32Updated 3 months ago
- Extensible FPGA control platform☆60Updated 2 years ago
- Extended and external tests for Verilator testing☆16Updated this week
- ☆59Updated 3 years ago
- Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores☆50Updated last year
- AHB-Lite based SoC for IBEX/SWERV/VEXRISC/...☆13Updated last month
- A ZipCPU SoC for the Nexys Video board supporting video functionality☆17Updated 5 months ago
- This repository is an open-source version of SKY130 to help facilitate use of Cadence Design System tools for use with Skywater 130 Proce…☆23Updated last year
- A collection of debugging busses developed and presented at zipcpu.com☆41Updated last year
- few python scripts to clone all IP cores from opencores.org☆22Updated last year
- ☆36Updated 2 years ago
- Universal Advanced JTAG Debug Interface☆17Updated 11 months ago
- Demo SoC for SiliconCompiler.☆59Updated 2 months ago
- Time to Digital Converter (TDC)☆30Updated 4 years ago
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆35Updated 2 years ago
- ☆10Updated last year
- Small footprint and configurable Inter-Chip communication cores☆57Updated 2 weeks ago
- Open Source AES☆31Updated last year
- USB -> AXI Debug Bridge☆36Updated 3 years ago
- A current mode buck converter on the SKY130 PDK☆27Updated 3 years ago
- Open FPGA Modules☆23Updated 7 months ago
- ⛔ DEPRECATED ⛔ RISC-V manycore accelerator for HERO, bigPULP hardware platform☆51Updated 3 years ago
- IEEE 754 single precision floating point library in systemverilog and vhdl☆29Updated 4 months ago
- an inverter drawn in magic with makefile to simulate☆26Updated 2 years ago