Alternatives and similar repositories for Advanced-Embedded-System-Design-Flow-on-Zynq

Users that are interested in Advanced-Embedded-System-Design-Flow-on-Zynq are comparing it to the libraries listed below

• xupgit / Zynq-Design-using-Vivado
  This XUP course provides an introduction to embedded system design on Zynq using the Xilinx Vivado software suite.
  ☆84Updated last year
• cathalmccabe / PYNQ_tutorials
  ☆91Updated last year
• erihsu / INT_FP_MAC
  INT8 & FP16 multiplier accumulator (MAC) design with UVM verification completed.
  ☆103Updated 4 years ago
• VenciFreeman / FFT_ChipDesign
  A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.
  ☆64Updated 9 months ago
• suoglu / Fixed-Floating-Point-Adder-Multiplier
  16-bit Adder Multiplier hardware on Digilent Basys 3
  ☆75Updated last year
• nanamake / r22sdf
  Pipeline FFT Implementation in Verilog HDL
  ☆117Updated 6 years ago
• thedatabusdotio / fpga-ml-accelerator
  This repository hosts the code for an FPGA based accelerator for convolutional neural networks
  ☆152Updated 11 months ago
• abdelazeem201 / Design-and-ASIC-Implementation-of-32-Point-FFT-Processor
  I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …
  ☆42Updated last year
• ahmedshahein / DSP-RTL-Lib
  RTL Verilog library for various DSP modules
  ☆88Updated 3 years ago
• esynr3z / axi_vip_demo
  Xilinx AXI VIP example of use
  ☆40Updated 4 years ago
• AhmedAalaaa / 32-point-FFT-Verilog-design-based-DIT-butterfly-algorithm
  This project aims to design an 32-point FFT (Fast Fourier Transform) based DIT (decimation in time) Butterfly Algorithm with multiple clo…
  ☆54Updated last year
• keyonhome / AXI4_LiteIP
  A verilog FPGA Interface for AXI4_Lite from Slave side
  ☆11Updated 4 years ago
• Xilinx / PYNQ_Composable_Pipeline
  PYNQ Composabe Overlays
  ☆72Updated 11 months ago
• Xilinx / xup_high_level_synthesis_design_flow
  AMD University Program HLS tutorial
  ☆95Updated 7 months ago
• bakhshalipour / NoC-Verilog
  A verilog implementation for Network-on-Chip
  ☆73Updated 7 years ago
• CodeNameGrapefruit / SoC_CNN
  Convolutional Neural Network Implemented in Verilog for System on Chip
  ☆27Updated 6 years ago
• mmxsrup / axi4-interface
  AXI4 and AXI4-Lite interface definitions
  ☆94Updated 4 years ago
• freecores / dma_ahb
  AHB DMA 32 / 64 bits
  ☆55Updated 10 years ago
• pontazaricardo / Verilog_Calculator_Matrix_Multiplication
  This is a simple project that shows how to multiply two 3x3 matrixes in Verilog.
  ☆49Updated 7 years ago
• k0nze / zedboard_axi4_master_burst_example
  Quick Example how to generate an custom AXI4 IP with AXI4-Full interface (burst) for the Zynq (ZedBoard)
  ☆43Updated 7 years ago
• freecores / dma_axi
  AXI DMA 32 / 64 bits
  ☆114Updated 10 years ago
• IA-C-Lab-Fudan / Chisel-FFT-generator
  FFT generator using Chisel
  ☆59Updated 3 years ago
• nishthaparashar / Floating-Point-ALU-in-Verilog
  32-Bit Algorithms of Floating Point Operations are implemented on Verilog with logic Operations.
  ☆85Updated 6 years ago
• maomran / softmax
  Verilog implementation of Softmax function
  ☆66Updated 2 years ago
• StefanSredojevic / Deep-Neural-Network-Hardware-Accelerator
  SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…
  ☆110Updated 5 years ago
• Verdvana / AXI4_Interconnect
  AXI总线连接器
  ☆97Updated 5 years ago
• karthisugumar / CSE240D-Hierarchical_Mesh_NoC-Eyeriss_v2
  A SystemVerilog implementation of Row-Stationary dataflow and Hierarchical Mesh Network-on-Chip Architecture based on Eyeriss CNN Acceler…
  ☆160Updated 5 years ago
• ultraembedded / core_sdram_axi4
  SDRAM controller with AXI4 interface
  ☆94Updated 5 years ago
• ShonTaware / SRAM_SKY130
  Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns
  ☆69Updated 4 years ago
• adki / gen_amba
  AMBA bus generator including AXI, AHB, and APB
  ☆101Updated 3 years ago