xmpf / awesome-risc-vView external linksLinks
Curated list of awesome resources related with RISC-V
☆94Aug 17, 2022Updated 3 years ago
Alternatives and similar repositories for awesome-risc-v
Users that are interested in awesome-risc-v are comparing it to the libraries listed below
Sorting:
- 😎 A curated list of awesome RISC-V implementations☆142Mar 12, 2023Updated 2 years ago
- It contains a curated list of awesome RISC-V Resources.☆296Jan 18, 2025Updated last year
- A curated list of awesome HDL, libraries, typical implementation and references.☆37Oct 19, 2016Updated 9 years ago
- RISCulator is a RISC-V emulator.☆12Aug 18, 2023Updated 2 years ago
- ☆14Mar 26, 2025Updated 10 months ago
- Chameleon: A MatMul-Free TCN Accelerator for End-to-End Few-Shot and Continual Learning from Sequential Data☆25Jun 6, 2025Updated 8 months ago
- Rust port of TinyCrypt's CCM mode implementation using RustCrypto's AES☆13Jun 13, 2020Updated 5 years ago
- A curated list of Computer Architecture and Systems resources☆589Jan 30, 2026Updated 2 weeks ago
- ☆14Nov 30, 2023Updated 2 years ago
- An LLVM pass to compress code by identifying and extracting recurrent program slices.☆32Oct 21, 2025Updated 3 months ago
- Lightweight re-packaging of AsyncQueue library from rocket-chip☆19Jun 23, 2023Updated 2 years ago
- Openlinux mirror☆37Jan 3, 2026Updated last month
- A synthesizable picmicro-midrange clone for FPGAs☆13Nov 8, 2019Updated 6 years ago
- A List of Free and Open Source Hardware Verification Tools and Frameworks☆591Jan 3, 2026Updated last month
- Curated List of Game Console / Gaming Computer Development, Game Console / Gaming Computer Emulator, Hardware and Electronic Engineering …☆16Jun 2, 2025Updated 8 months ago
- Wrapper shells enabling designs generated by rocket-chip to map onto certain FPGA boards☆20Nov 27, 2024Updated last year
- Notes for Advanced Topics in Foundations of Programming Languages (Spring 2024)☆18Jul 24, 2024Updated last year
- ☆15Mar 6, 2021Updated 4 years ago
- RISC-V toy operating system developed on live stream☆16Aug 10, 2021Updated 4 years ago
- A set of Ada components to allow 3D simulations, games and GUI's in Ada.☆14Jan 22, 2022Updated 4 years ago
- An interpreter for a small dialect of Forth written in Go.☆19Apr 7, 2019Updated 6 years ago
- Qemu Emulator for TTGO TDisplay esp32 board.☆26Feb 9, 2026Updated last week
- SOPHGO RISC-V Zero Stage BootLoader☆27Jan 10, 2026Updated last month
- Verilog AST☆21Dec 2, 2023Updated 2 years ago
- A curated list of awesome open source hardware design tools☆85Jun 20, 2025Updated 7 months ago
- Lightweight MessagePack library☆23Sep 3, 2025Updated 5 months ago
- Public GPU docs☆27Jan 7, 2017Updated 9 years ago
- A Language for Closed-form High-level ARchitecture Modeling☆21Feb 10, 2020Updated 6 years ago
- RISCV CPU implementation in SystemVerilog☆32Oct 1, 2025Updated 4 months ago
- Hardware Description Languages☆1,112Jul 14, 2025Updated 7 months ago
- A curated list of awesome resources for HDL design and verification☆169Feb 6, 2026Updated last week
- EDA wiki☆53Mar 1, 2023Updated 2 years ago
- My nix setup☆26Updated this week
- Software tools that support rocket-chip (GNU toolchain, ISA simulator, tests)☆60Oct 1, 2023Updated 2 years ago
- ☆64Nov 9, 2021Updated 4 years ago
- Message Signaled Interrupts for RISC-V☆28Sep 15, 2024Updated last year
- Problem Sets for MIT 6.512 Formal Reasoning About Programs, Spring 2023☆31May 10, 2023Updated 2 years ago
- Fast interface for SGX secure enclaves. Based on ISCA 2017 HotCalls paper☆24Apr 16, 2021Updated 4 years ago
- The CORE-V CVA5 is an Application class 5-stage RISC-V CPU specifically targetting FPGA implementations.☆127Jul 11, 2025Updated 7 months ago