wwagner33 / adpll-vhdlView external linksLinks
All-Digital Phase-Locked Loops (ADPLL) code in High Speed Integrated Circuit Hardware Description Language (VHDL) for a Field Programmable Gate Array (FPGA). The code is for the Intel/Altera Cyclone V FPGA.
☆12Oct 20, 2025Updated 3 months ago
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