cjhonlyone / ADC-lvds
Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS
☆49Updated 2 years ago
Alternatives and similar repositories for ADC-lvds:
Users that are interested in ADC-lvds are comparing it to the libraries listed below
- Interfacing ZYNQ SoC device with ADC, Transferring data through DMA and LwIP☆43Updated 3 years ago
- Implementation of JESD204B Transport Layer & part of Data Link Layer☆32Updated 3 years ago
- ☆28Updated 5 years ago
- JESD204b modules in VHDL☆29Updated 5 years ago
- FPGA和USB3.0桥片实现USB3.0通信☆61Updated 3 years ago
- 通过调试ADRV9009和AD9371对jesd204b知识点作进一步学习和总结☆22Updated 5 years ago
- Interface Protocol in Verilog☆49Updated 5 years ago
- Test SRIO connection between FPGA (Kintex-7) and DSP (C6678)☆17Updated 7 years ago
- A fast high-resolution time-to-digital converter in the Red Pitaya Zynq-7010 SoC☆55Updated 3 years ago
- Delta-sigma ADC,PDM audio FPGA Implementation☆68Updated 2 years ago
- This repository contains simple implementation of UDP/IP stack with 64-bit AXI-Stream interface. ICMP and ARP requests are partially supp…☆48Updated 2 years ago
- FPGA Technology Exchange Group相关文件管理☆43Updated last year
- DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3☆52Updated 2 years ago
- MMC小组开发的一个基于Cortex-M0的ARM处理器核的无线SOC设计☆21Updated last year
- Gigabit Ethernet UDP communication driver☆73Updated 5 years ago
- A simple Verilog SPI master / slave implementation featuring all 4 modes.☆50Updated 4 years ago
- It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.☆68Updated 9 months ago
- A 26ps RMS time-to-digital converter (TDC) core for Spartan-6 FPGAs☆59Updated 10 years ago
- Verilog implementation of a tapped delay line TDC☆38Updated 6 years ago
- Collection of all FPGA related PSI libraries in the correct folder strucutre. Each library is included as submodule.☆33Updated 10 months ago
- 这是使用FPGA开发CMOS的两个真实项目,之前的fpga_design仅是一个未完善的版本,同时也删除了一些与项目无关的东西☆33Updated 7 years ago
- Project: Precise Measure of time delays in FPGA☆28Updated 7 years ago
- 软件无线电,使用FPGA进行正交解调。☆19Updated 6 years ago
- I2C Master and Slave☆33Updated 9 years ago
- AD7606 driver verilog☆37Updated 5 years ago
- Verilog Modules for a Digital PI Controller implemented on a Digilent NEXYS 4-DDR FPGA☆30Updated 4 years ago
- A collection of phase locked loop (PLL) related projects☆103Updated last year
- Must-have verilog systemverilog modules☆31Updated 2 years ago
- kintex7 ov13850 fpga mipi camera☆18Updated last year
- 基于FPGA的三速以太网UDP协议栈设计☆22Updated 11 months ago