Alternatives and similar repositories for Modulator-Verilog-:

Users that are interested in Modulator-Verilog- are comparing it to the libraries listed below

• biren15 / Design-and-Verification-of-LDPC-Decoder
  - Designed the LDPC decoder in the Matlab using the min-sum approach. - Designed quantized RTL in Verilog with the min-sum approach and …
  ☆50Updated 7 years ago
• Grootzz / AD9361_TX_MSK
  A project demonstrate how to config ad9361 to TX mode and how to transmit MSK
  ☆55Updated 5 years ago
• freedomhust / LDPC_MS
  最小和算法实现
  ☆10Updated 4 years ago
• jfoshea / Viterbi-Decoder-in-Verilog
  An efficient implementation of the Viterbi decoding algorithm in Verilog
  ☆51Updated last year
• ziruizhu / ofdm
  Toy OFDM Communication System with FPGA
  ☆11Updated 3 years ago
• hhping / LDPC_en-decoder
  LDPC编码解码matlab代码和Verilog代码及资料
  ☆45Updated 6 years ago
• Hyacinth2333 / QC_LDPC-ECC
  NMS_decode
  ☆11Updated 4 years ago
• Lcrypto / FEC-Archive-Verilog
  Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…
  ☆60Updated last year
• arun1993 / FPGA-Wireless-communication-blocks
  Implementation of Wireless communication blocks such as FFT, OFDM receiver, Polar code decoder in a FPGA using Vivado HLS
  ☆21Updated 4 years ago
• lauchinyuan / FPGA_QPSK-modem
  A QPSK modem written in the Verilog hardware description language, that can be implemented on FPGA
  ☆125Updated last year
• phthinh / OFDM_802_11
  IEEE 802.11 OFDM-based transceiver system
  ☆33Updated 7 years ago
• dshekhalev / FEC
  FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)
  ☆95Updated 9 months ago
• yugithub / OFDM-baseband
  Verilog实现OFDM基带
  ☆42Updated 9 years ago
• sudhamshu091 / ldpc-encoder-decoder
  ☆11Updated 3 years ago
• nanamake / r22sdf
  Pipeline FFT Implementation in Verilog HDL
  ☆102Updated 5 years ago
• alexandresoaresilva / QAM
  16-QAM implemented on Xilinx Basys3, running at 100 MHz, sending the preamble of the U.S. const.
  ☆7Updated 6 years ago
• Anthon1e / JESD204B-Transport-and-Data-Link-Layer
  Implementation of JESD204B Transport Layer & part of Data Link Layer
  ☆32Updated 3 years ago
• qxdn / 16QAM
  16QAM modulation and demodulation by Verilog
  ☆20Updated 4 years ago
• ghaziiii / Digital-predistortion
  This project aims to implement a digital predistortion algorithm for power amplifier linearizion using vhdl. It contains VHDL design for …
  ☆16Updated 2 years ago
• freecores / dvb_s2_ldpc_decoder
  DVB-S2 LDPC Decoder
  ☆27Updated 10 years ago
• RedFlag2017 / rs-codec
  Reed Solomon Encoder and Decoder Digital IP
  ☆19Updated 4 years ago
• uwemeyerbaese / DSP_with_FPGAs_ed4
  DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3
  ☆54Updated 2 years ago
• Spartak0s / Polar-Codes-Hardware-VHDL
  Polar Codes Implementation on Vhdl
  ☆12Updated 8 years ago
• strath-sdr / rfsoc_ofdm
  PYNQ example of an OFDM Transmitter and Receiver on RFSoC.
  ☆46Updated last year
• strath-sdr / rfsoc_qpsk
  PYNQ example of using the RFSoC as a QPSK transceiver.
  ☆98Updated last year
• coole198669 / viterbi_decoder
  Hardware Viterbi Decoder in verilog
  ☆24Updated 5 years ago
• DexWen / LMS-Adaptive-filter
  LMS-Adaptive Filter implement using verilog and Matlab
  ☆42Updated 8 years ago
• KevinHexin / FPGA-Bicubic-interpolation
  use Verilog HDL implemente bicubic interpolation in FPGA
  ☆21Updated 5 years ago
• maxs-well / LMS-sound-filtering-by-Verilog
  LMS sound filtering by Verilog
  ☆39Updated 4 years ago
• Joinn99 / Costas-Loop-Matlab-Simulation
  matlab
  ☆13Updated 6 years ago