Alternatives and similar repositories for FPGA-Wireless-communication-blocks

Users that are interested in FPGA-Wireless-communication-blocks are comparing it to the libraries listed below

• biren15 / Design-and-Verification-of-LDPC-Decoder
  - Designed the LDPC decoder in the Matlab using the min-sum approach. - Designed quantized RTL in Verilog with the min-sum approach and …
  ☆51Updated 7 years ago
• hhping / LDPC_en-decoder
  LDPC编码解码matlab代码和Verilog代码及资料
  ☆46Updated 6 years ago
• CY0807 / BRAM_DDR3_HDMI
  在FPGA中将图像数据输入到DDR3中，再输送到HDMI接口上进行显示。
  ☆27Updated 2 years ago
• Lcrypto / FEC-Archive-Verilog
  Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…
  ☆73Updated 2 years ago
• Hyacinth2333 / QC_LDPC-ECC
  NMS_decode
  ☆15Updated 5 years ago
• wangyuxiao2000 / ccsds-ldpc
  ccsds ldpc encdoer and decoder.(CCSDS 131.1-O-2)
  ☆21Updated 10 months ago
• crboth / LDPC_Decoder
  Low Density Parity Check Decoder
  ☆16Updated 8 years ago
• trivedidvijen / SPI-to-I2C-Protocol-Conversion-Using-Verilog
  SPI to I2C Protocol Conversion Using Verilog. Final Year BTech project. Also published an IEEE paper.
  ☆10Updated 4 years ago
• Mshivam2409 / LDPC-Decoder
  Implementation of Partially Parellel LDPC Code Decoder in Verilog
  ☆14Updated 5 years ago
• RedFlag2017 / rs-codec
  Reed Solomon Encoder and Decoder Digital IP
  ☆21Updated 5 years ago
• Starrynightzyq / ZYNQ-PYNQ-Z2-Gobang
  2018第二届全国大学生FPGA创新设计邀请赛的作品
  ☆60Updated 6 years ago
• Spartak0s / Polar-Codes-Hardware-VHDL
  Polar Codes Implementation on Vhdl
  ☆13Updated 9 years ago
• phthinh / OFDM_802_11
  IEEE 802.11 OFDM-based transceiver system
  ☆34Updated 7 years ago
• yugithub / OFDM-baseband
  Verilog实现OFDM基带
  ☆44Updated 9 years ago
• ajackevic / ELEC5882
  The Design and Implementation of a Pulse Compression Filter on an FPGA.
  ☆30Updated 3 years ago
• lisliyongming / JESD204B
  通过调试ADRV9009和AD9371对jesd204b知识点作进一步学习和总结
  ☆23Updated 5 years ago
• freedomhust / LDPC_MS
  最小和算法实现
  ☆10Updated 5 years ago
• sainathiyer / Hardware-Implementation-of-Polar-Code-for-5G-Application-on-FPGA
  Polar codes are error correction codes developed by Erdal Arikan which achieves channel capacity and its reduced complexity makes it more…
  ☆17Updated 4 years ago
• freecores / dvb_s2_ldpc_decoder
  DVB-S2 LDPC Decoder
  ☆27Updated 11 years ago
• jfoshea / Viterbi-Decoder-in-Verilog
  An efficient implementation of the Viterbi decoding algorithm in Verilog
  ☆54Updated last year
• Lcrypto / Construct-Long-Length-Block-and-Convolutional-MET-QC-LDPC-
  construction high perfomance long length, low error floor block Multi-edge Type (MET) QC-LDPC codes and Tail-Biting convolutional MET QC-…
  ☆32Updated last year
• liuguangxi / wifi_ldpc_codec
  Wi-Fi LDPC codec Verilog IP core
  ☆17Updated 5 years ago
• ziruizhu / ofdm
  Toy OFDM Communication System with FPGA
  ☆12Updated 3 years ago
• CodePurble / ldpc-fpga
  Playground for implementing LDPC codes on FPGA
  ☆16Updated 2 years ago
• DexWen / LMS-Adaptive-filter
  LMS-Adaptive Filter implement using verilog and Matlab
  ☆44Updated 8 years ago
• Grootzz / Verilog-FIR
  FIR implemention with Verilog
  ☆48Updated 6 years ago
• Nitcloud / Two-way-voice-receiver
  2019年全国大学生电子设计大赛G题双路语音调频接收机的FPGA全实现
  ☆14Updated 5 years ago
• Grootzz / AD9361_TX_MSK
  A project demonstrate how to config ad9361 to TX mode and how to transmit MSK
  ☆58Updated 6 years ago
• cea-wind / hls_ldpc_dec
  Full piplined LDPC decoder (IEEE 802.16e) implement in FPGA using Xilinx HLS(C synthesis to Verilog Codes)..
  ☆40Updated 6 years ago
• GJigar / ZYNQ_CNN
  ☆19Updated 2 years ago