Alternatives and similar repositories for FPGA-Wireless-communication-blocks:

Users that are interested in FPGA-Wireless-communication-blocks are comparing it to the libraries listed below

• Hyacinth2333 / QC_LDPC-ECC
  NMS_decode
  ☆11Updated 4 years ago
• biren15 / Design-and-Verification-of-LDPC-Decoder
  - Designed the LDPC decoder in the Matlab using the min-sum approach. - Designed quantized RTL in Verilog with the min-sum approach and …
  ☆50Updated 7 years ago
• hhping / LDPC_en-decoder
  LDPC编码解码matlab代码和Verilog代码及资料
  ☆45Updated 6 years ago
• Lcrypto / FEC-Archive-Verilog
  Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…
  ☆60Updated last year
• sudhamshu091 / ldpc-encoder-decoder
  ☆11Updated 3 years ago
• freedomhust / LDPC_MS
  最小和算法实现
  ☆10Updated 4 years ago
• ziruizhu / ofdm
  Toy OFDM Communication System with FPGA
  ☆11Updated 3 years ago
• Grootzz / AD9361_TX_MSK
  A project demonstrate how to config ad9361 to TX mode and how to transmit MSK
  ☆55Updated 5 years ago
• jfoshea / Viterbi-Decoder-in-Verilog
  An efficient implementation of the Viterbi decoding algorithm in Verilog
  ☆51Updated last year
• wangyuxiao2000 / ccsds-ldpc
  ccsds ldpc encdoer and decoder.(CCSDS 131.1-O-2)
  ☆15Updated 5 months ago
• ajackevic / ELEC5882
  The Design and Implementation of a Pulse Compression Filter on an FPGA.
  ☆28Updated 3 years ago
• yugithub / OFDM-baseband
  Verilog实现OFDM基带
  ☆42Updated 9 years ago
• phthinh / OFDM_802_11
  IEEE 802.11 OFDM-based transceiver system
  ☆32Updated 7 years ago
• Spartak0s / Polar-Codes-Hardware-VHDL
  Polar Codes Implementation on Vhdl
  ☆12Updated 8 years ago
• FlyHighInSky / OFDM-on-FPGA
  ☆13Updated 2 years ago
• Mshivam2409 / LDPC-Decoder
  Implementation of Partially Parellel LDPC Code Decoder in Verilog
  ☆14Updated 4 years ago
• liuguangxi / wifi_ldpc_codec
  Wi-Fi LDPC codec Verilog IP core
  ☆17Updated 5 years ago
• sainathiyer / Hardware-Implementation-of-Polar-Code-for-5G-Application-on-FPGA
  Polar codes are error correction codes developed by Erdal Arikan which achieves channel capacity and its reduced complexity makes it more…
  ☆16Updated 3 years ago
• trivedidvijen / SPI-to-I2C-Protocol-Conversion-Using-Verilog
  SPI to I2C Protocol Conversion Using Verilog. Final Year BTech project. Also published an IEEE paper.
  ☆9Updated 3 years ago
• falwat / code_repo
  My code repositry for common use.
  ☆22Updated 3 years ago
• RedFlag2017 / rs-codec
  Reed Solomon Encoder and Decoder Digital IP
  ☆19Updated 4 years ago
• lisliyongming / JESD204B
  通过调试ADRV9009和AD9371对jesd204b知识点作进一步学习和总结
  ☆22Updated 5 years ago
• maxs-well / LMS-sound-filtering-by-Verilog
  LMS sound filtering by Verilog
  ☆39Updated 4 years ago
• aq12138 / Git_Bilbili
  verilog
  ☆21Updated last year
• Grootzz / Verilog-FIR
  FIR implemention with Verilog
  ☆46Updated 5 years ago
• louisinhit / CNN-for-modulation-recognition-based-on-FPGA
  ☆18Updated 2 years ago
• Teddy-van-Jerry / sdr-psk-fpga
  Dual-Mode PSK Transceiver on SDR With FPGA
  ☆28Updated 5 months ago
• lauchinyuan / FPGA_QPSK-modem
  A QPSK modem written in the Verilog hardware description language, that can be implemented on FPGA
  ☆124Updated last year
• lauchinyuan / FPGA_DDR3_Ctrl
  An AXI DDR3 SDRAM controller for FPGA
  ☆31Updated last year
• CY0807 / BRAM_DDR3_HDMI
  在FPGA中将图像数据输入到DDR3中，再输送到HDMI接口上进行显示。
  ☆24Updated 2 years ago