erbanhun / ZTE_DPD
☆11Updated 6 years ago
Alternatives and similar repositories for ZTE_DPD:
Users that are interested in ZTE_DPD are comparing it to the libraries listed below
- High Radix Adaptive CORDIC Algorithm - Improvement over Traditional CORDIC☆13Updated 8 years ago
- LMS sound filtering by Verilog☆39Updated 4 years ago
- A dual-camera based on OminiVison 5460 for GoWin GW2A-55K Combat Board☆33Updated 3 years ago
- A CORDIC implementation of square root Verilog calculation on Quartus Prime 16.0, with ability to simulate on ModelSim as well.☆15Updated 3 years ago
- FPGA Technology Exchange Group相关文件管理☆43Updated last year
- An AXI DDR3 SDRAM controller for FPGA☆30Updated last year
- Delta-sigma ADC,PDM audio FPGA Implementation☆67Updated 2 years ago
- Delta-Sigma modulator (DSM) for fractional phase locked loop.☆26Updated 3 years ago
- USB2.0 Verilog☆17Updated 5 years ago
- LMS-Adaptive Filter implement using verilog and Matlab☆40Updated 8 years ago
- A project demonstrate how to config ad9361 to TX mode and how to transmit MSK☆54Updated 5 years ago
- Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS☆49Updated 2 years ago
- FIR filter implementation☆23Updated 4 years ago
- Reed Solomon Encoder and Decoder Digital IP☆19Updated 4 years ago
- MMC小组开发的一个基于Cortex-M0的ARM处理器核的无线SOC设计☆21Updated last year
- All digital PLL☆27Updated 7 years ago
- DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3☆52Updated 2 years ago
- 【例程】简单的FPGA入门项目 适用于各类Cyclone 开发板☆20Updated last month
- verilog☆21Updated last year
- Implementation of JESD204B Transport Layer & part of Data Link Layer☆31Updated 3 years ago
- FFT implementation using CORDIC algorithm written in Verilog.☆30Updated 6 years ago
- A digital phase-locked loop implemented on Spartan-6☆12Updated 6 years ago
- 基于FPGA的三速以太网UDP协议栈设计☆22Updated 10 months ago
- The Design and Implementation of a Pulse Compression Filter on an FPGA.☆25Updated 3 years ago
- I2C Master and Slave☆32Updated 9 years ago
- 通过调试ADRV9009和AD9371对jesd204b知识点作进一步学习和总结☆22Updated 5 years ago
- ☆28Updated 5 years ago
- fpga i2c slave verilog hdl rtl☆12Updated 9 years ago
- RTL Verilog library for various DSP modules☆84Updated 3 years ago