Alternatives and similar repositories for LDPC_MS

Users that are interested in LDPC_MS are comparing it to the libraries listed below

• Hyacinth2333 / QC_LDPC-ECC
  NMS_decode
  ☆15Updated 5 years ago
• biren15 / Design-and-Verification-of-LDPC-Decoder
  - Designed the LDPC decoder in the Matlab using the min-sum approach. - Designed quantized RTL in Verilog with the min-sum approach and …
  ☆52Updated 8 years ago
• hhping / LDPC_en-decoder
  LDPC编码解码matlab代码和Verilog代码及资料
  ☆47Updated 7 years ago
• liuguangxi / wifi_ldpc_codec
  Wi-Fi LDPC codec Verilog IP core
  ☆18Updated 5 years ago
• Lcrypto / FEC-Archive-Verilog
  Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…
  ☆76Updated 2 years ago
• lisliyongming / JESD204B
  通过调试ADRV9009和AD9371对jesd204b知识点作进一步学习和总结
  ☆22Updated 5 years ago
• ziruizhu / ofdm
  Toy OFDM Communication System with FPGA
  ☆12Updated 3 years ago
• RedFlag2017 / rs-codec
  Reed Solomon Encoder and Decoder Digital IP
  ☆21Updated 5 years ago
• dshekhalev / FEC
  FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)
  ☆121Updated last year
• tyxiumud / gvim_for_verilog
  this repository is vim cfg for verilog.
  ☆50Updated last year
• aq12138 / Git_Bilbili
  verilog
  ☆21Updated 2 years ago
• Spartak0s / Polar-Codes-Hardware-VHDL
  Polar Codes Implementation on Vhdl
  ☆13Updated 9 years ago
• russdill / bch_verilog
  Verilog based BCH encoder/decoder
  ☆125Updated 3 years ago
• arun1993 / FPGA-Wireless-communication-blocks
  Implementation of Wireless communication blocks such as FFT, OFDM receiver, Polar code decoder in a FPGA using Vivado HLS
  ☆27Updated 4 years ago
• wangyuxiao2000 / ccsds-ldpc
  ccsds ldpc encdoer and decoder.(CCSDS 131.1-O-2)
  ☆24Updated last year
• lauchinyuan / FPGA_QPSK-modem
  A QPSK modem written in the Verilog hardware description language, that can be implemented on FPGA
  ☆172Updated last year
• Grootzz / AD9361_TX_MSK
  A project demonstrate how to config ad9361 to TX mode and how to transmit MSK
  ☆58Updated 6 years ago
• aquaxis / IPCORE
  ☆141Updated 10 years ago
• CY0807 / BRAM_DDR3_HDMI
  在FPGA中将图像数据输入到DDR3中，再输送到HDMI接口上进行显示。
  ☆29Updated 2 years ago
• DexWen / FFT_Verilog
  FFT implement by verilog_测试验证已通过
  ☆59Updated 9 years ago
• coole198669 / viterbi_decoder
  Hardware Viterbi Decoder in verilog
  ☆26Updated 6 years ago
• suisuisi / FPGA
  FPGA
  ☆127Updated 5 years ago
• red435 / verilog_APB_SPI_interface
  SPI interface connect to APB BUS with Verilog HDL
  ☆37Updated 4 years ago
• wyvernSemi / eccExamples
  Error correction and detection example Verilog (hamming and Reed-Solomon) to accompany presentation material
  ☆11Updated last year
• C-H-Chien / FPGA_SIFT-LES
  Integration of SIFT and LES Algorithms
  ☆13Updated last year
• nanamake / r22sdf
  Pipeline FFT Implementation in Verilog HDL
  ☆133Updated 6 years ago
• VenciFreeman / FFT_ChipDesign
  A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.
  ☆67Updated last year
• suisuisi / FPGAandImage
  image processing based FPGA
  ☆115Updated 4 years ago
• alexforencich / verilog-lfsr
  Fully parametrizable combinatorial parallel LFSR/CRC module
  ☆157Updated 7 months ago
• jfoshea / Viterbi-Decoder-in-Verilog
  An efficient implementation of the Viterbi decoding algorithm in Verilog
  ☆56Updated last year