Alternatives and similar repositories for Reed-Solomon-:

Users that are interested in Reed-Solomon- are comparing it to the libraries listed below

• freecores / ethmac
  Ethernet MAC 10/100 Mbps
  ☆79Updated 5 years ago
• freecores / xge_mac
  Ethernet 10GE MAC
  ☆45Updated 10 years ago
• ultraembedded / core_soc
  Basic Peripheral SoC (SPI, GPIO, Timer, UART)
  ☆61Updated 4 years ago
• ahmedshahein / DSP-RTL-Lib
  RTL Verilog library for various DSP modules
  ☆84Updated 2 years ago
• olofk / fifo
  Generic FIFO implementation with optional FWFT
  ☆55Updated 4 years ago
• ultraembedded / core_dbg_bridge
  UART -> AXI Bridge
  ☆60Updated 3 years ago
• brown9804 / PCIe_physical_layer
  Implementation of the PCIe physical layer
  ☆32Updated 2 weeks ago
• russdill / bch_verilog
  Verilog based BCH encoder/decoder
  ☆117Updated 2 years ago
• buttercutter / DDR
  A simple DDR3 memory controller
  ☆54Updated 2 years ago
• alexforencich / verilog-cam
  Verilog Content Addressable Memory Module
  ☆101Updated 2 years ago
• alknvl / axis_udp
  This repository contains simple implementation of UDP/IP stack with 64-bit AXI-Stream interface. ICMP and ARP requests are partially supp…
  ☆46Updated 2 years ago
• ultraembedded / core_sdram_axi4
  SDRAM controller with AXI4 interface
  ☆85Updated 5 years ago
• FPGA-Networking / Low-Cost-and-Programmable-CRC
  Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"
  ☆42Updated 4 years ago
• freecores / i2c
  I2C controller core
  ☆37Updated 2 years ago
• Anthon1e / JESD204B-Transport-and-Data-Link-Layer
  Implementation of JESD204B Transport Layer & part of Data Link Layer
  ☆28Updated 3 years ago
• uwemeyerbaese / DSP_with_FPGAs_ed4
  DSP with FPGAs 4. edition ISBN: 978-3-642-45308-3
  ☆50Updated 2 years ago
• waviousllc / wav-lpddr-hw
  Wavious DDR (WDDR) Physical interface (PHY) Hardware
  ☆99Updated 3 years ago
• damdoy / fpga_image_processing
  IP operations in verilog (simulation and implementation on ice40)
  ☆55Updated 5 years ago
• freecores / round_robin_arbiter
  round robin arbiter
  ☆70Updated 10 years ago
• mmxsrup / axi4-interface
  AXI4 and AXI4-Lite interface definitions
  ☆88Updated 4 years ago
• andres-mancera / ethernet_10ge_mac_SV_tb
  SystemVerilog testbench for an Ethernet 10GE MAC core
  ☆44Updated 8 years ago
• RoaLogic / Hamming-ECC
  Hamming ECC Encoder and Decoder to protect memories
  ☆29Updated this week
• dawsonjon / verilog-math
  Mathematical Functions in Verilog
  ☆86Updated 3 years ago
• funannoka / SoC-Design-DDR3-Controller
  DDR3 SDRAM Memory Controller Design & Synthesis using System Verilog
  ☆30Updated 6 years ago
• alexforencich / cocotbext-eth
  Ethernet interface modules for Cocotb
  ☆59Updated last year
• antmicro / nvme-verilog-pcie
  ☆53Updated 2 years ago
• samy-maxvy / MAXVY_MIPI_I3C_Basic_Master_Controller_IP
  It is Gate level netlist of MAXVY's MIPI I3C Basic Master Controller IP along with APB interface support.
  ☆16Updated 5 years ago
• efabless / raptor_soc_template
  Raptor is an SoC Design Template based on Arm Cortex M0 or M3 core.
  ☆18Updated 5 years ago
• alexforencich / verilog-lfsr
  Fully parametrizable combinatorial parallel LFSR/CRC module
  ☆142Updated 2 years ago
• aquaxis / gemac
  Gigabit MAC + UDP/TCP/IP offload Engine
  ☆31Updated 5 years ago