HEP-SoC / PeakRDL-halcppView external linksLinks
C++ 17 Hardware abstraction layer generator from systemrdl
☆14Jan 25, 2026Updated 3 weeks ago
Alternatives and similar repositories for PeakRDL-halcpp
Users that are interested in PeakRDL-halcpp are comparing it to the libraries listed below
Sorting:
- ☆14Nov 15, 2025Updated 3 months ago
- A low power platform based on X-HEEP and integrating the ESL-CGRA☆17Nov 12, 2025Updated 3 months ago
- Control and status register code generator toolchain☆173Dec 3, 2025Updated 2 months ago
- SystemRDL 2.0 language compiler front-end☆271Jan 16, 2026Updated 3 weeks ago
- ☆11Dec 10, 2025Updated 2 months ago
- CMake based hardware build system☆35Jan 30, 2026Updated 2 weeks ago
- Import and export IP-XACT XML register models☆37Nov 5, 2025Updated 3 months ago
- HTB_Write_Ups☆27Feb 25, 2024Updated last year
- Ray tracing with MATLAB☆11Aug 30, 2018Updated 7 years ago
- Ice40 open source HDMI examples on BlackIce II☆11May 12, 2022Updated 3 years ago
- A risc-v simulator based on SystrmC☆14Jan 7, 2022Updated 4 years ago
- ☆11Dec 10, 2025Updated 2 months ago
- WWVB emulator using an ESP32☆10Apr 2, 2020Updated 5 years ago
- Bootloader tool for OLS☆22Jul 17, 2016Updated 9 years ago
- small board to convert linear 3 pin regulator to switching regulator (TO220 compatible, eg 7805)☆11Oct 8, 2015Updated 10 years ago
- Arduiggler: Arduino based JTAG cable with UrJTAG☆10Oct 16, 2020Updated 5 years ago
- A RISC-V RV32 model ready for SMT program synthesis.☆12Jun 23, 2021Updated 4 years ago
- CORE-V eXtension Interface compliant RISC-V [F|Zfinx] Coprocessor☆13Nov 12, 2025Updated 3 months ago
- LimeSDR with Matlab☆11Dec 30, 2019Updated 6 years ago
- GPGPU version of 数え上げお姉さん(https://github.com/primenumber/kazoeage-oneesan)☆11Dec 3, 2021Updated 4 years ago
- Blinking Led Project☆10Aug 29, 2023Updated 2 years ago
- Sipeed Maix Uart Face Recognition Module/Firmware's Protocol Parse Library☆10Jun 5, 2019Updated 6 years ago
- DEPRECATED: Convert OpenSCAD to JSCAD (See the link below)☆23Dec 30, 2018Updated 7 years ago
- Verilog+VHDL Hierarchy Management tool ( IDE ) wraps around Vim, runs in Linux terminal window.☆12Jan 15, 2017Updated 9 years ago
- RISC-V Virtual Prototype☆46Oct 1, 2021Updated 4 years ago
- A beginning of a free and open source firmware for LKV373 V2. To be improved.☆10Jun 30, 2021Updated 4 years ago
- Port of Brian Bennet's NES Emulator for the second generation Panologic thin client☆13Apr 21, 2022Updated 3 years ago
- Hardcaml Verification Tools☆14Jan 15, 2026Updated 3 weeks ago
- ☆14Feb 6, 2024Updated 2 years ago
- Python G-CODE metadata parsing library☆12Oct 6, 2025Updated 4 months ago
- Resources from my class on computer architecture design☆10Apr 25, 2018Updated 7 years ago
- ☆10Dec 17, 2022Updated 3 years ago
- A CUDA renderer for the Buddhabrot fractal☆13Sep 14, 2023Updated 2 years ago
- A simple web gui for Transmission☆19Sep 25, 2010Updated 15 years ago
- Demo project for CoIDE to use the USB peripheral of Nucleo F401 board as USB host or device with Mass Storage Class.☆10Dec 3, 2014Updated 11 years ago
- ☆16Jan 25, 2026Updated 3 weeks ago
- The excellent Diolan bootloader modified to use standard (non-extended) instruction set and still fit in 1 kB bootblock☆10Oct 6, 2023Updated 2 years ago
- A Xtext based SystemRDL editor with syntax highlighting and context sensitive help☆12Feb 9, 2024Updated 2 years ago
- Hardware Implementation of low-bit rate Codec, Codec2 in Verilog RTL on Cyclone IV FPGA.☆13Mar 29, 2020Updated 5 years ago