Alternatives and similar repositories for AWGN_Generator

Users that are interested in AWGN_Generator are comparing it to the libraries listed below

• liuguangxi / gng
  Gaussian noise generator Verilog IP core
  ☆32Updated 2 years ago
• falwat / code_repo
  My code repositry for common use.
  ☆23Updated 4 years ago
• phthinh / OFDM_802_16
  IEEE 802.16 OFDM-based transceiver system
  ☆28Updated 6 years ago
• crboth / LDPC_Decoder
  Low Density Parity Check Decoder
  ☆18Updated 9 years ago
• Teddy-van-Jerry / sdr-psk-fpga
  Dual-Mode PSK Transceiver on SDR With FPGA
  ☆50Updated last year
• Lcrypto / FEC-Archive-Verilog
  Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…
  ☆80Updated 2 years ago
• mesarcik / DRFM
  Code for paper entitled "Low Cost FPGA based Implementation of a DRFM System"
  ☆30Updated 4 years ago
• ajackevic / ELEC5882
  The Design and Implementation of a Pulse Compression Filter on an FPGA.
  ☆32Updated 4 years ago
• strath-sdr / rfsoc_ofdm
  PYNQ example of an OFDM Transmitter and Receiver on RFSoC.
  ☆59Updated this week
• FernandoGuiomar / CPR_VHDL
  VHDL implementation of carrier phase recovery (CPR) techniques for coherent optical systems
  ☆16Updated 5 years ago
• uwemeyerbaese / DSP_with_FPGAs_ed3
  DSP with FPGAs 3. edition ISBN: 978-3-540-72612-8
  ☆15Updated 2 months ago
• codyps / wimax_ofdm
  Partial Verilog implimentation of a WiMAX OFDM Phy
  ☆19Updated 13 years ago
• coralhu123 / KC705-AD9371
  The implementation of AD9371 on KC705
  ☆20Updated 7 months ago
• MicroPhase / antsdr_standalone
  Standalone application based on ADI hdl and no_OS for ANTSDR.
  ☆23Updated 9 months ago
• cea-wind / hls_ldpc_dec
  Full piplined LDPC decoder (IEEE 802.16e) implement in FPGA using Xilinx HLS(C synthesis to Verilog Codes)..
  ☆42Updated 6 years ago
• phthinh / OFDM_802_11
  IEEE 802.11 OFDM-based transceiver system
  ☆41Updated 8 years ago
• Grootzz / AD9361_TX_1MHz_Baseband_800Hz_IF
  A project demonstrate how to config ad9361 to TX mode
  ☆11Updated 7 years ago
• yugithub / OFDM-baseband
  Verilog实现OFDM基带
  ☆45Updated 9 years ago
• CodePurble / ldpc-fpga
  Playground for implementing LDPC codes on FPGA
  ☆17Updated 3 years ago
• chinkwo / FPGA-multiboot
  通过SPI协议实现FPGA multiboot在线升级功能
  ☆11Updated 7 years ago
• analogdevicesinc / TransceiverToolbox
  MATLAB toolbox for ADI transceiver products
  ☆64Updated last week
• Grootzz / AD9361_TX_MSK
  A project demonstrate how to config ad9361 to TX mode and how to transmit MSK
  ☆62Updated 6 years ago
• MazinLab / RFSoC_OPFB
  A High-Throughput Oversampled Polyphase Filter Bank Using Vivado HLS and PYNQ on a RFSoC
  ☆41Updated last year
• analogdevicesinc / ad936x-filter-wizard
  MATLAB-based FIR filter design
  ☆62Updated last year
• analogdevicesinc / HighSpeedConverterToolbox
  MATLAB toolbox for ADI high speed converter products
  ☆27Updated 2 months ago
• ntpt7921 / Verilog_UDP_TCP
  Module giải mã và đóng gói cho các giao thức IP/TCP+UDP. Viết bằng Verilog. Đề tài thực hiện cho Đồ án thiết kế luận lý.
  ☆13Updated 4 years ago
• MeowLucian / SDR_FM_Radio
  Using Software Designed Radio to transmit & receive FM signal
  ☆48Updated 7 years ago
• strath-sdr / rfsoc_notebooks
  A collection of RFSoC introductory notebooks for PYNQ.
  ☆25Updated 4 years ago
• phthinh / OFDM_802_22
  ☆14Updated 8 years ago
• FDU-ME-ARC / NVMeCHA
  ☆20Updated 4 years ago