Alternatives and similar repositories for gvim_for_verilog

Users that are interested in gvim_for_verilog are comparing it to the libraries listed below

• HonkW93 / automatic-verilog
  automatic-verilog based on vimscript
  ☆271Updated last year
• adki / AMBA_AXI_AHB_APB
  AMBA bus lecture material
  ☆465Updated 5 years ago
• adki / gen_amba_2021
  AMBA bus generator including AXI4, AXI3, AHB, and APB
  ☆222Updated 2 years ago
• lizhirui / AXI_spec_chinese
  AXI协议规范中文翻译版
  ☆163Updated 3 years ago
• courageheart / AMBA_APB_SRAM
  AMBA v.3 APB v.1 Specification Complaint Slave SRAM Core design and testbench. The testbench is developed using System Verilog and UVM an…
  ☆179Updated 7 years ago
• RongyeL / EasyAXI
  ☆66Updated last week
• Verdvana / AXI4_Interconnect
  AXI总线连接器
  ☆103Updated 5 years ago
• taichi-ishitani / tvip-axi
  AMBA AXI VIP
  ☆422Updated last year
• dumpo / my_verilog_projects
  数字IC秋招项目、手撕代码
  ☆38Updated last year
• CustomizableComputingLab / CustomizableComputingLab.github.io
  ☆149Updated last week
• brentwang-lab / uvm_tb_gen
  This is for uvm_tb_gen
  ☆39Updated 7 months ago
• lauchinyuan / Booth4_wallace_MULT16_16
  A 16-bit by 16-bit signed binary multiplier based on the Radix-4 Booth algorithm and Wallace Tree reduction
  ☆56Updated last year
• hxfycy / 1024-point-fft
  Radix-4 1024 point fft in verilog
  ☆11Updated 5 years ago
• Daniel-GGB / My-Digital-IC-Library
  我的数字IC厂库：Verilog HDL; System Vreilog; UVM; ModelSim; Quartus II;
  ☆95Updated 3 years ago
• WalkerLau / DetectHumanFaces
  Real time face detection based on Arm Cortex-M3 DesignStart and FPGA
  ☆206Updated 2 years ago
• huangxc6 / E203_CNN_Genesys2
  Final Project of Software_Hardware_Co-Design_24Spring. FPGA-based RISC-V+ Convolutional Acceleration Unit.
  ☆20Updated last year
• troyguo / awesome-dv
  Awesome ASIC design verification
  ☆323Updated 3 years ago
• freecores / dma_axi
  AXI DMA 32 / 64 bits
  ☆120Updated 11 years ago
• lucky-wfw / ARM_AMBA_Design
  Based on ARM AMBA bus protocol, Verilog is used to design the digital circuit.
  ☆130Updated 4 years ago
• hyf6661669 / Synopsys-Documents
  Some useful documents of Synopsys
  ☆83Updated 3 years ago
• funningboy / uvm_axi
  uvm AXI BFM(bus functional model)
  ☆260Updated 12 years ago
• wangjidwb123 / AHB-SRAMC
  IC Verification & SV Demo
  ☆54Updated 3 years ago
• CutestPanda / Opensoc
  包含了SOC设计中的通用IP，如外设、总线结构、基础、验证等
  ☆115Updated 3 weeks ago
• gillianGan / ahb_sram_master
  ☆19Updated 5 years ago
• ForrestBlue / cortexm0ds
  ☆68Updated 9 years ago
• dpretet / async_fifo
  A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
  ☆379Updated this week
• flyskywalker / ahb_sramc
  ahb scram controller, design and verification
  ☆27Updated 7 years ago
• Practical-UVM-Step-By-Step / Practical-UVM-Step-By-Step
  This is the main repository for all the examples for the book Practical UVM
  ☆202Updated 4 years ago
• dumpo / digital_IC_design_notes
  数字IC设计 学习笔记
  ☆154Updated 3 years ago
• marcoz001 / axi-uvm
  yet another AXI testbench repo. ;) This is for my UVM practice. https://marcoz001.github.io/axi-uvm/
  ☆126Updated 7 years ago