this repository is vim cfg for verilog.
☆57Apr 24, 2026Updated 3 months ago
Alternatives and similar repositories for gvim_for_verilog
Users that are interested in gvim_for_verilog are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Error correction and detection example Verilog (hamming and Reed-Solomon) to accompany presentation material☆10Jan 14, 2024Updated 2 years ago
- automatic-verilog based on vimscript☆290Oct 24, 2023Updated 2 years ago
- ☆31Aug 8, 2020Updated 6 years ago
- verification of simple axi-based cache☆19May 14, 2019Updated 7 years ago
- Reed Solomon Encoder and Decoder Digital IP☆22Jun 14, 2020Updated 6 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- This repository contains verilog files to implement Reed Solomon encoding and decoding on FPGA. Each symbol is of 8 bits. Message length …☆25Dec 17, 2019Updated 6 years ago
- Verilog极简教程☆36Apr 7, 2019Updated 7 years ago
- Undergraduate digital circuit laboratory☆29Jan 4, 2024Updated 2 years ago
- PolarDecoders implemented in Verilog. SC, SCL, CA-SCL and CA-PC-SCL are supported.☆10Sep 24, 2021Updated 4 years ago
- Code for "Understanding Metastability in SAR ADCs: Part II: Asynchronous"☆12Apr 19, 2022Updated 4 years ago
- Maven Silicon project - AHB-to-APB Bridge Verification using UVM Methodology.☆119Jul 2, 2023Updated 3 years ago
- Matlab codes for the paper “Distributed multi-stream beamforming in MIMO multi-relay interference networks,” by C. M. Yetis and R. Y. Cha…☆14Feb 9, 2025Updated last year
- MATLAB simulation code for dissertation project report☆14Sep 4, 2022Updated 3 years ago
- 本项目使用 Vivado 和 SDK 工程软件上完成系统设计和生成相关部署文件,并在 ARM+FPGA 完成项目部署,实现通过摄取图片并通过 ARM+FPGA 综合部署和加速识别算法,并通过显示驱动,在显示屏上显示摄像头原图和识别结果。☆10Aug 12, 2022Updated 4 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- ☆26Jul 22, 2026Updated 3 weeks ago
- A minimum configuration for Neovim targeting SystemVerilog that provides configuration for plugin management, a language server, tree-sit…☆29May 27, 2024Updated 2 years ago
- RiscSoC 是一个芯片集成项目,包含了 Cortex-M0、Cortex-M3、MIPS、RISC-V、4-BIT 等内核的 SoC 集成,部分 SoC 使用的自己设计的内核☆13Apr 26, 2022Updated 4 years ago
- Open Source Chip Project by University (OSCPU) - Zhoushan Core☆54Jul 23, 2022Updated 4 years ago
- A simple implementation about LEGv8 instruction set using Verilog HDL.☆12May 8, 2022Updated 4 years ago
- IFP (ic flow platform) is an integrated circuit design flow platform, mainly used for IC process specification management and data flow …☆205Jan 28, 2026Updated 6 months ago
- DPD using RLS Algorithm☆15Aug 5, 2018Updated 8 years ago
- Artifact associated with CHES 2022 paper https://tches.iacr.org/index.php/TCHES/article/view/9817☆12Nov 10, 2023Updated 2 years ago
- my emacs config☆13Mar 12, 2026Updated 5 months ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Transforming RIS-Assidted Passive Beamforming from Tedious to Simple: A Relaxation Algorithm for Ricain Channel☆12Nov 10, 2022Updated 3 years ago
- This is a open source project from UVM Community and it is based on an Ethernet Switch System-on-Chip (SoC).☆15May 16, 2021Updated 5 years ago
- This project is AHB_SRAM design based on 启芯学堂,which contains all the source files.☆14Mar 13, 2022Updated 4 years ago
- This project aims to implement a digital predistortion algorithm for power amplifier linearizion using vhdl. It contains VHDL design for …☆18Jan 11, 2023Updated 3 years ago
- 将 Verilog 设计规范、流水线模式与 FPGA 优化笔记结构化为可查询的本地知识库,供本地智能代理或脚本检索并返回带出处的实现建议与示例代码。☆24May 23, 2026Updated 2 months ago
- A set of yasnippets for emacs that assist with SystemVerilog☆11Nov 25, 2011Updated 14 years ago
- Some useful functions to process pdf file☆20Sep 13, 2025Updated 11 months ago
- A simple PDM microphone interface on FPGA☆15Jan 16, 2022Updated 4 years ago
- electrostatic demonstration☆11Aug 3, 2026Updated 2 weeks ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- AMBA bus lecture material☆548Jan 21, 2020Updated 6 years ago
- ☆131May 30, 2026Updated 2 months ago
- A simple spidergon network-on-chip with wormhole switching feature☆13Mar 22, 2021Updated 5 years ago
- A case study of a continuous-time Delta-Sigma modulator including system-level simulations/design of the CT-DSM, circuit-design of the fr…☆16Apr 14, 2026Updated 4 months ago
- Implementing the MATLAB example using 5G toolbox and Deep Learning Tolbox☆15Sep 1, 2021Updated 4 years ago
- This repository defines a Claude Code skill for working with Verilog☆18Apr 21, 2026Updated 3 months ago
- NTU Computer Architecture 2021 - CPU with Single issue, L1-cache☆11Jan 24, 2022Updated 4 years ago