Solution to COA LAB Assgn, IIT Kharagpur
☆37Jan 10, 2019Updated 7 years ago
Alternatives and similar repositories for Computer-Organization-and-Architecture-LAB
Users that are interested in Computer-Organization-and-Architecture-LAB are comparing it to the libraries listed below
Sorting:
- Implementation of a simple SIMD processor in Verilog, core of which is a 16-bit SIMD ALU. 2's compliment calculations are implemented in …☆145Jul 17, 2022Updated 3 years ago
- This project was inspired by the efforts of Ben Eater to build an 8 bit computer on a breadboard. Even though this one was not built on a…☆59Nov 30, 2022Updated 3 years ago
- miniSpartan6+ (Spartan6) FPGA based MP3 Player☆27Sep 2, 2019Updated 6 years ago
- [MIGRATED TO KRONOS] A webapp to serve past year records-grade distributions of IITKGP☆29Jun 15, 2024Updated last year
- Notes, codes and resources for the course Computer Organisation and Architecture, IIT Kharagpur☆11Nov 11, 2019Updated 6 years ago
- Educational computer simulator on a mission to "superscale" the study of computer architecture fundamentals☆13Updated this week
- ☆18Jun 3, 2017Updated 8 years ago
- An introduction to integrated circuit design with Verilog and the Papilio Pro development board.☆15Jan 5, 2025Updated last year
- CSC403: Computer Organization and Architecture [COA] & CSL403: Processor Architecture Lab [PAL] | SE Semester IV | Computer Engineering☆19Feb 20, 2026Updated last week
- the project includes system design of a t intersection traffic light controller and its verilog code in vivado design suite.☆48Jul 18, 2020Updated 5 years ago
- Exercises of the FPGA Prototyping By Verilog Examples book by Pong P. Chu☆25Jun 5, 2018Updated 7 years ago
- [DEPRECATED | ApnaInsti HAS IT] A web application to connect people with similar journey details and share rides☆19Oct 5, 2023Updated 2 years ago
- Generate UVM testbench framework template files with Python 3☆27Dec 23, 2019Updated 6 years ago
- This repository contains all labs done as a part of the Embedded Logic and Design course.☆26Jun 10, 2018Updated 7 years ago
- RISC V core implementation using Verilog.☆29Mar 27, 2021Updated 4 years ago
- Hardware Viterbi Decoder in verilog☆29May 28, 2019Updated 6 years ago
- A pipelined MIPS CPU supporting 31 MIPS instructions, interrupt and cache.☆20Jul 12, 2015Updated 10 years ago
- Implementing Different Adder Structures in Verilog☆74Sep 3, 2019Updated 6 years ago
- The mighty hero helping you build projects on top of IIT Kharagpur's academic data☆35Nov 13, 2018Updated 7 years ago
- Assignments/MIDSEM/ENDSEM question papers of courses at IITK.☆11May 7, 2024Updated last year
- This tool automates and facilitates an Differential fault analysis attack on AES 128 with a fault injected between the 2 last MixColumns☆13Nov 9, 2022Updated 3 years ago
- A little bit of help.☆13Jul 25, 2024Updated last year
- IITK CSE 5th semester course materials, lecture notes, assignments, and resources for CS-330, CS-340, CS-345, CS-771, and ESO-201☆11Aug 20, 2025Updated 6 months ago
- PCI Express ® Base Specification Revision 3.0☆13May 23, 2018Updated 7 years ago
- Write ups for DRDO CTF☆10Jan 13, 2018Updated 8 years ago
- Igloo2 M2GL025 Creative Development Board☆11Oct 15, 2019Updated 6 years ago
- MAC system with IEEE754 compatibility☆13Nov 22, 2023Updated 2 years ago
- This project give overview of RTL to GDSII of universal shift register using OpenLane and Skywater130 PDK. OpenLane is an automated open-…☆11Jul 19, 2022Updated 3 years ago
- Mobilenet v1 (3,128,128, alpha=0.25) on STMH7 using STMCube AI☆10Oct 25, 2019Updated 6 years ago
- ☆10Nov 17, 2025Updated 3 months ago
- git mirror of cvs.delorie.com:/cvs/djgpp☆12Nov 16, 2025Updated 3 months ago
- bug bounty☆11Aug 13, 2023Updated 2 years ago
- Verification IP for Watchdog☆12Apr 6, 2021Updated 4 years ago
- core placement optimization☆13Dec 25, 2021Updated 4 years ago
- A library to parse BLIF (Berkeley Logic Interchange Format) files.☆10Mar 11, 2015Updated 10 years ago
- Integrated Development Environment(IDE) for Java Programming named Silver-J written in C#.Net☆10Dec 27, 2020Updated 5 years ago
- CPU simulation framework for CS520 (Binghamton University, Graduate Computer Architecture)☆10May 10, 2018Updated 7 years ago
- Building a Computer From Scratch with verilog☆11Feb 6, 2026Updated 3 weeks ago
- "I claim that relativity and the rest of modern physics is not complicated. It can be explained very simply. It is only unusual or, put a…☆11Nov 12, 2019Updated 6 years ago