SinghCoder / Icarus_VerilogLinks
This repo contains code snippets written in verilog as part of course Computer Architecture of my university curriculum
☆55Updated 4 years ago
Alternatives and similar repositories for Icarus_Verilog
Users that are interested in Icarus_Verilog are comparing it to the libraries listed below
Sorting:
- Solution to COA LAB Assgn, IIT Kharagpur☆36Updated 7 years ago
- Contains the Lab Sheets and their Solutions of the Computer Architecture Course in BITS Pilani☆18Updated 2 years ago
- Verilog modules for beginners☆28Updated 3 years ago
- Tutorial series on verilog with code examples. Contains basic verilog code implementations and concepts.☆61Updated 5 years ago
- For aspiring hardware engineers out there.☆81Updated 10 months ago
- Design and Analysis of CMOS Inverter using the sky130 pdk and various open source tools☆124Updated 3 years ago
- All the projects and assignments done as part of VLSI course.☆20Updated 5 years ago
- A customized RISCV core made using verilog☆19Updated 4 years ago
- ☆35Updated 4 years ago
- An overview of TL-Verilog resources and projects☆82Updated last month
- ☆64Updated 4 years ago
- Reconfigurable Computing Lab, DESE, Indian Institiute of Science☆29Updated 3 years ago
- the project includes system design of a t intersection traffic light controller and its verilog code in vivado design suite.☆48Updated 5 years ago
- RISC V core implementation using Verilog.☆28Updated 4 years ago
- Project ideas list for Google Summer of Code.☆18Updated this week
- Training Neural Networks using Analog circuits☆27Updated 5 years ago
- ☆119Updated 4 years ago
- opensource EDA tool flor VLSI design☆36Updated 2 years ago
- ☆17Updated 2 years ago
- Verilog Snippets for partial fulfilment of CS-F342 Computer Architecture,BITS Pilani☆17Updated 8 years ago
- This project was inspired by the efforts of Ben Eater to build an 8 bit computer on a breadboard. Even though this one was not built on a…☆59Updated 3 years ago
- Digital Design verilog tricky problems having industry standards☆28Updated 5 years ago
- This project was done as a part of RISC-V based MYTH (Microprocessor for you in Thirty Hours) workshop organized by Kunal Ghosh and Steve…☆82Updated 2 years ago
- This repo has some usefull links to websites for topics, please fork add and generate a pull-request to join the party☆76Updated last year
- Gain an understanding of the fundamentals of Very Large-Scale Integration (VLSI), including how the theories and concepts can be applied …☆290Updated 8 months ago
- This project give overview of RTL to GDSII of universal shift register using OpenLane and Skywater130 PDK. OpenLane is an automated open-…☆11Updated 3 years ago
- SystemVerilog for ASIC/FPGA Design & Simulation, with Synopsys Tool Flow☆52Updated 9 months ago
- This repository is dedicated to exploring the practical aspects of analog electronic circuits and Analog VLSI design. It contains a colle…☆25Updated last year
- Repository of problems and solutions of labsheets used for Data Structures and Algorithms (CS F211) in Semester 2, 2020-21 at BITS Pilani…☆27Updated 4 years ago
- Synthesizable Verilog Source Codes(DUT), Test-bench and Simulation Results.☆39Updated 6 years ago