This repo contains code snippets written in verilog as part of course Computer Architecture of my university curriculum
☆55Nov 27, 2021Updated 4 years ago
Alternatives and similar repositories for Icarus_Verilog
Users that are interested in Icarus_Verilog are comparing it to the libraries listed below
Sorting:
- verification of the basic router protocol with UVM testbech //INCLUDED WITH RTL☆14Jan 4, 2019Updated 7 years ago
- Contains the Lab Sheets and their Solutions of the Computer Architecture Course in BITS Pilani☆19Jan 6, 2024Updated 2 years ago
- Final Project for my course in Advanced Verification with SystemVerilog OOP☆22Dec 17, 2021Updated 4 years ago
- Maven Silicon Project☆20Oct 13, 2018Updated 7 years ago
- Research Interan@BARC FPGA based High-Throughput Generic ECC Implementation in Binary Extension Field☆24Feb 20, 2017Updated 9 years ago
- Architectural design of data router in verilog☆33Dec 29, 2019Updated 6 years ago
- Tutorial series on verilog with code examples. Contains basic verilog code implementations and concepts.☆61Nov 25, 2020Updated 5 years ago
- Project 2.2 Frequency counter☆12May 30, 2025Updated 9 months ago
- Course project of Computer Architecture, designed by single-cycle datapath. The verilog code could be completely compiled by Quartus II.☆28Feb 14, 2021Updated 5 years ago
- Data Structures and Algorithms. Contribute and Learn together.☆11Oct 11, 2022Updated 3 years ago
- Solution to COA LAB Assgn, IIT Kharagpur☆37Jan 10, 2019Updated 7 years ago
- All of my Verilog_HDL codes☆11Apr 5, 2021Updated 4 years ago
- - A 1X3 Router (capable of routing the data packets to three different clients form a single source network) was designed, including a re…☆11Jun 3, 2019Updated 6 years ago
- Vehicle templates with multibody suspension and electric powertrain sized for Formula Student competitions.☆15Feb 25, 2026Updated last week
- MAC system with IEEE754 compatibility☆13Nov 22, 2023Updated 2 years ago
- A GUI to help users visualize the structure of a verilog HDL project☆12Jul 26, 2015Updated 10 years ago
- Portal for 2024 SIT batch being mentored at the Advnaced VLSI Lab.☆11Apr 9, 2023Updated 2 years ago
- Python tools for processing Verilog files☆10Dec 7, 2011Updated 14 years ago
- my UVM training projects☆39Mar 14, 2019Updated 6 years ago
- A technical companion repository archiving code implementations and research artifacts shared on ResearchGate.☆12Feb 21, 2026Updated last week
- This repository documents the learning from VSD "RTL Design Using Verilog With SKY130 Technology" workshop☆41Jun 6, 2021Updated 4 years ago
- North Carolina State University: ECE 745 : Project: LC3 Microcontroller Functional Verification using SystemVerilog☆11Jun 5, 2017Updated 8 years ago
- Training materials I've written.☆11Nov 11, 2025Updated 3 months ago
- This repository contains a detailed description of how to generate parameterized cells using GDSFactory-based layout automation tool GLay…☆13Oct 14, 2024Updated last year
- study the kernel data structures and its API☆13May 10, 2022Updated 3 years ago
- ☆16Mar 27, 2024Updated last year
- EE4415 Project : AES Verilog☆10Apr 25, 2019Updated 6 years ago
- Not All Patches Are Equal: Hierarchical Dataset Condensation for Single Image Super-Resolution☆10May 7, 2024Updated last year
- Netlist and Verilog Haskell Package☆19Nov 21, 2010Updated 15 years ago
- IITH BTECH CSE all Courses' Codes and Assignments☆11May 12, 2021Updated 4 years ago
- 手持设备环境的搭建及程序开发，如手持终端设备、PDA手持终端、条码数据采集器等设备☆11Oct 20, 2016Updated 9 years ago
- Examples of unions, interfaces, and assertions in SystemVerilog☆13Aug 31, 2013Updated 12 years ago
- Yet another implementation of TI C6x DSP simulator☆12Jan 16, 2014Updated 12 years ago
- This repository contains all the solutions of assignments, starter files and other materials related to this specialization.☆10Jan 31, 2021Updated 5 years ago
- This repo stores something about reverse engineering technique fundemental☆15Jan 16, 2023Updated 3 years ago
- An MIPS pipelined processor with hazard detection for the course VE370 (FA2020) at UMJI.☆11Dec 28, 2020Updated 5 years ago
- unite.vim session source☆24Nov 29, 2016Updated 9 years ago
- Link to C++ Code Templates I **used** to use for Competitive Programming | Though most of these have been used, I don't provide any guara…☆10Mar 29, 2017Updated 8 years ago
- NSCSCC “龙芯杯” 2024 个人赛 LoongArch 赛道三等奖☆14Aug 17, 2024Updated last year