This repo contains code snippets written in verilog as part of course Computer Architecture of my university curriculum
☆56Nov 27, 2021Updated 4 years ago
Alternatives and similar repositories for Icarus_Verilog
Users that are interested in Icarus_Verilog are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- verification of the basic router protocol with UVM testbech //INCLUDED WITH RTL☆15Jan 4, 2019Updated 7 years ago
- Verilog Snippets for partial fulfilment of CS-F342 Computer Architecture,BITS Pilani☆17Nov 17, 2017Updated 8 years ago
- Source code for Speedlight, a system for Synchronized Network Snapshots☆10Aug 21, 2020Updated 5 years ago
- Architectural design of data router in verilog☆33Dec 29, 2019Updated 6 years ago
- Maven Silicon Project☆20Oct 13, 2018Updated 7 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Research Interan@BARC FPGA based High-Throughput Generic ECC Implementation in Binary Extension Field☆23Feb 20, 2017Updated 9 years ago
- An automatic speaker recognition system built from digital signal processing tools, Vector Quantization and LBG algorithm☆10May 24, 2021Updated 5 years ago
- Computer Architecture -VLSI -Verilog Codes-Xilinx-Irsim☆14May 8, 2021Updated 5 years ago
- Asynchronous fifo in verilog☆38Mar 20, 2016Updated 10 years ago
- Cryptonight Monero Verilog code for ASIC☆20Mar 29, 2018Updated 8 years ago
- Netlist and Verilog Haskell Package☆19Nov 21, 2010Updated 15 years ago
- Versatile framework for multi-party computation on the web. Based on the implementation of MP-SPDZ.☆16Aug 13, 2025Updated 10 months ago
- Project 2.2 Frequency counter☆12May 30, 2025Updated last year
- Tutorial series on verilog with code examples. Contains basic verilog code implementations and concepts.☆66Nov 25, 2020Updated 5 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- P.S Its easy is a website to cater to all your PS allotment needs☆34Jan 3, 2023Updated 3 years ago
- Examples of unions, interfaces, and assertions in SystemVerilog☆13Aug 31, 2013Updated 12 years ago
- Verilog Code for I2C Protocol☆19Nov 12, 2020Updated 5 years ago
- Solution to COA LAB Assgn, IIT Kharagpur☆37Jan 10, 2019Updated 7 years ago
- ☆21Oct 20, 2025Updated 8 months ago
- - A 1X3 Router (capable of routing the data packets to three different clients form a single source network) was designed, including a re…☆11Jun 3, 2019Updated 7 years ago
- All of my Verilog_HDL codes☆11Apr 5, 2021Updated 5 years ago
- Contains basic examples for understanding Java concepts.☆25Mar 21, 2020Updated 6 years ago
- Python tools for processing Verilog files☆10Dec 7, 2011Updated 14 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- A blinky project for the ULX3S v3.0.3 FPGA board☆17Jan 16, 2026Updated 5 months ago
- Course project of Computer Architecture, designed by single-cycle datapath. The verilog code could be completely compiled by Quartus II.☆30Feb 14, 2021Updated 5 years ago
- Cebinae: Scalable In-network Fairness Augmentation (SIGCOMM 2022)☆22Jul 2, 2022Updated 4 years ago
- Finds average exp per encounter of Pokemon areas☆19Updated this week
- Approximate arithmetic circuits for FPGAs☆13Feb 19, 2020Updated 6 years ago
- Verilog HDL implementation of an ECHO machine and an FIR filter that filters out a specific noise. More details provided in individual fi…☆10Aug 25, 2019Updated 6 years ago
- ☆31Aug 8, 2020Updated 5 years ago
- Not All Patches Are Equal: Hierarchical Dataset Condensation for Single Image Super-Resolution☆10May 7, 2024Updated 2 years ago
- FPGA Verilog HDL design project (DE1-SoC)☆13Jan 19, 2018Updated 8 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Simple blockchain implementation using python and flask. It implements basic concepts of blockchain, like proof of work, mining, consensu…☆14Mar 6, 2021Updated 5 years ago
- An MIPS pipelined processor with hazard detection for the course VE370 (FA2020) at UMJI.☆11Dec 28, 2020Updated 5 years ago
- Multimedia SoC Design with Specialization on Application Acceleration with High-Level-Synthesis [2020 Fall]☆12Jun 15, 2021Updated 5 years ago
- Simple design for 16x2 OLED Character Display using the US2066 chip☆13Apr 20, 2023Updated 3 years ago
- Java library for parsing and manipulating graph representations of gate-level Verilog netlists☆15Jan 9, 2017Updated 9 years ago
- CS3339 Computer Architecture class project - 5 stage MIPS-like processor with forwarding, hazard control, no exception handling.☆22Apr 25, 2018Updated 8 years ago
- Using OpenPose and a fully connected network, this project compares the user's pose and a target pose to see if the user is doing yoga co…☆24Nov 22, 2022Updated 3 years ago