Alternatives and similar repositories for Hardware-Engineer-Interview-Questions

Users that are interested in Hardware-Engineer-Interview-Questions are comparing it to the libraries listed below

• arm-university / VLSI-Fundamentals-Education-Kit
  Gain an understanding of the fundamentals of Very Large-Scale Integration (VLSI), including how the theories and concepts can be applied …
  ☆272Updated 4 months ago
• abdelazeem201 / ASIC-Design-Roadmap
  The journey of designing an ASIC (application specific integrated circuit) is long and involves a number of major steps – moving from a c…
  ☆398Updated 2 months ago
• arm-university / Introduction-to-SoC-Design-Education-Kit
  Gain an introductory knowledge to the basics of SoC design and key skills required to implement a simple SoC on an FPGA, and write embedd…
  ☆141Updated this week
• raulbehl / 100DaysOfRTL
  100 Days of RTL
  ☆393Updated last year
• ARC-Lab-UF / sv-tutorial
  SystemVerilog Tutorial
  ☆176Updated this week
• amradel2020 / vlsi_linkedin_index
  This repo provide an index of VLSI content creators and their materials
  ☆157Updated last year
• snbk001 / Verilog-Design-Examples
  Verilog Design Examples with self checking testbenches. Half Adder, Full Adder, Mux, ALU, D Flip Flop, Sequence Detector using Mealy mach…
  ☆158Updated last year
• D-curs-D / Inverter-design-and-analysis-using-sky130pdk
  Design and Analysis of CMOS Inverter using the sky130 pdk and various open source tools
  ☆119Updated 3 years ago
• FPGADude / Digital-Design
  Verilog HDL files
  ☆153Updated last year
• m3y54m / FPGA-ASIC-Roadmap
  A roadmap for those who want to build a career as an FPGA / ASIC Engineer
  ☆417Updated 10 months ago
• ash-olakangal / RISC-V-Processor
  Verilog implementation of multi-stage 32-bit RISC-V processor
  ☆129Updated 4 years ago
• Akashtailor-exe / 30-days-of-verilog
  30 Days of Verilog: Dive into digital circuits with a month of Verilog coding challenges. From logic gates to FSMs, sharpen your skills a…
  ☆48Updated 2 years ago
• aseddin / ece_3300
  ECE 3300 HDL Code
  ☆58Updated 2 years ago
• arm-university / Advanced-System-on-Chip-Design-Education-Kit
  Design, implement, and test an Arm Cortex-A-based SoCs on FPGA hardware using functional specifications, standard hardware description an…
  ☆113Updated this week
• UndefeatedSunny / VLSI-Interview-Questions
  Digital Design verilog tricky problems having industry standards
  ☆26Updated 5 years ago
• digital-design-hq / Digital-Resources
  ☆61Updated 3 years ago
• ekb0412 / 100DaysofRTL
  "100 days of RTL" is a personal project to learn Verilog HDL RTL design in 100 days, using Xilinx Vivado
  ☆96Updated 2 years ago
• mikeroyal / Verilog-SystemVerilog-Guide
  Verilog/SystemVerilog Guide
  ☆73Updated last year
• AngeloJacobo / FPGA_Book_Experiments
  My completed projects from "FPGA Prototyping by Verilog Examples" book by Pong P. Chu
  ☆149Updated 4 years ago
• Ummidichandrika / 100-Days-of-RTL
  ☆116Updated last year
• maazm007 / vsdsquadron-mini-internship
  VSDSquadron Research Internship 2024 program where we learn about RISC-V processor and VLSI Design using various open source tools.
  ☆29Updated 2 months ago
• Subhasis-Sahu / SFAL-VSD
  ☆13Updated last year
• pengwubj / hw_interview_questions
  A collection of commonly asked RTL design interview questions
  ☆34Updated 8 years ago
• lowRISC / style-guides
  lowRISC Style Guides
  ☆460Updated 4 months ago
• rajdeep66 / edaBundle_whyRD
  opensource EDA tool flor VLSI design
  ☆34Updated 2 years ago
• vedic-partap / Computer-Organization-and-Architecture-LAB
  Solution to COA LAB Assgn, IIT Kharagpur
  ☆36Updated 6 years ago
• stevehoover / LF-Building-a-RISC-V-CPU-Core
  ☆422Updated 7 months ago
• suryakantamangaraj / AwesomeRISC-VResources
  It contains a curated list of awesome RISC-V Resources.
  ☆259Updated 8 months ago
• Akash-Perla / ASIC-Design
  This repository contains the tasks performed for VL508- Physical Design of ASIC Course (Fall 2024)
  ☆31Updated 10 months ago
• klyone / opencores-ip
  A huge collection of VHDL/Verilog open-source IP cores scraped from the web
  ☆118Updated 9 years ago