FTDI FT245 Style Synchronous/Asynchronous FIFO Bridge
☆35Jun 5, 2021Updated 5 years ago
Alternatives and similar repositories for core_ftdi_bridge
Users that are interested in core_ftdi_bridge are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- 🔴 SystemVerilog FPGA cores to communicate with FTDI Synchronous/Asynchronous FIFOs (FT245 protocol)☆47Jul 16, 2021Updated 4 years ago
- Verilog module to communicate with the FT245 interface of an FTDI FT2232H☆17Nov 14, 2020Updated 5 years ago
- Library of generic verilog buildingblocks☆17Dec 25, 2025Updated 6 months ago
- An FPGA-based FT232H/FT600 chip controller for rapid data transmission via USB. 使用FT232H/FT600芯片进行FPGA与电脑之间的高速数据传输。☆354May 21, 2024Updated 2 years ago
- A LiteX module implementing a USB UAC2 module with simple PDM in/out☆16Feb 16, 2022Updated 4 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Fault Injection Automatic Test Equipment☆15Nov 22, 2021Updated 4 years ago
- USB -> AXI Debug Bridge☆45Jun 5, 2021Updated 5 years ago
- UART -> AXI Bridge☆76Jul 1, 2021Updated 5 years ago
- Xilinx IP repository☆13May 5, 2018Updated 8 years ago
- Wishbone SATA Controller☆26Jun 23, 2026Updated last week
- Candy size USB to UART bridge.☆18Feb 18, 2021Updated 5 years ago
- Another tiny RISC-V implementation☆67Jul 19, 2021Updated 4 years ago
- A complete 65C02 computer with VGA output on a Lattice Ultra Plus FPGA☆29Jun 12, 2019Updated 7 years ago
- Verilog FT245 to AXI stream interface☆29Jun 20, 2018Updated 8 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- SPI-Flash XIP Interface (Verilog)☆50Oct 24, 2021Updated 4 years ago
- A Motorola 68000 Computer☆24Jun 1, 2019Updated 7 years ago
- SDRAM controller with AXI4 interface☆105Aug 8, 2019Updated 6 years ago
- IEEE-488 (GP-IB, HP-IB) synthesizable core in VHDL☆20Jan 15, 2016Updated 10 years ago
- An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.☆55Dec 6, 2023Updated 2 years ago
- Basic USB-CDC device core (Verilog)☆91May 15, 2021Updated 5 years ago
- Labs for the Ibex Demo System☆18Nov 18, 2023Updated 2 years ago
- Basic loadout for SQRL Acorn CLE 215/215+ board. Blinks all LEDs, outputs square waves on all 12 GPIO outputs☆71Nov 21, 2021Updated 4 years ago
- unsigned Radix-2 SRT division,基2除法☆17May 12, 2015Updated 11 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Open-Channel Open-Way Flash Controller☆25Sep 10, 2021Updated 4 years ago
- Standalone SDR experiment using multicore MCU☆11Apr 12, 2018Updated 8 years ago
- Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS☆68Oct 20, 2022Updated 3 years ago
- ☆17Oct 6, 2023Updated 2 years ago
- An FPGA-based GZIP (Deflate algorithm) compressor, which inputs raw data and outputs standard GZIP format (as known as .gz file format). …☆156Sep 15, 2023Updated 2 years ago
- Sata 2 Host Controller for FPGA implementation☆18Oct 11, 2017Updated 8 years ago
- Groundhog - Serial ATA Host Bus Adapter☆23Jun 10, 2018Updated 8 years ago
- My minimal emacs setup☆12Aug 16, 2023Updated 2 years ago
- Programmable persistent computers for Minecraft.☆15Feb 25, 2022Updated 4 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Contains VHDL IP-blocks to create stand-alone RapidIO-endpoints, RapidIO-switches and RapidIO-switches with local endpoints.☆32Jun 8, 2017Updated 9 years ago
- Common elements for FPGA Design (FIFOs, RAMs, etc.)☆41Feb 24, 2025Updated last year
- Verilog FPGA code : including experimental DSP audio processor☆13Dec 1, 2020Updated 5 years ago
- MMC (and derivative standards) host controller☆25Sep 14, 2020Updated 5 years ago
- Kratos: An FPGA Benchmark for Unrolled Deep Neural Networks with Fine-Grained Sparsity and Mixed Precision☆12Jan 19, 2026Updated 5 months ago
- Projects for the Scarab Minispartan6+ FPGA board☆14Jun 20, 2015Updated 11 years ago
- 本工具用于自动生成一个Wallace Tree算法VerilogHDL代码实例，并附带了一些配套的工具和一个完整的VerilogHDL描述的乘法器。☆27Jun 1, 2023Updated 3 years ago