A RISC-V SBC based around the LambdaConcept USB2Sniffer FPGA board.
☆30May 10, 2020Updated 5 years ago
Alternatives and similar repositories for riscv_sbc
Users that are interested in riscv_sbc are comparing it to the libraries listed below
Sorting:
- Projects for the ECPiX-5 - a ECP5 FPGA board.☆14Jul 5, 2020Updated 5 years ago
- USB Full-Speed core written in migen/LiteX☆12Sep 19, 2019Updated 6 years ago
- USB serial device (CDC-ACM)☆45Jun 28, 2020Updated 5 years ago
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆11Dec 14, 2022Updated 3 years ago
- Linux support for International Test Instruments' 1480A USB protocol analyzer☆15May 13, 2019Updated 6 years ago
- Wishbone SATA Controller☆24Oct 16, 2025Updated 4 months ago
- USB Full-Speed core written in migen/LiteX☆17Sep 2, 2019Updated 6 years ago
- A version of f32c/arduino that works with the SpinalHDL Vexriscv Murax SoC☆14May 23, 2019Updated 6 years ago
- A configurable USB 2.0 device core☆32Jun 12, 2020Updated 5 years ago
- VexRiscV system with GDB-Server in Hardware☆21Jul 5, 2023Updated 2 years ago
- Notes on/tools for/new firmware for (?) a PDC002 USB PD cable☆17Apr 8, 2021Updated 4 years ago
- FPGA implementation of the AnotherWorld CPU (equivalent to the original VM)☆16Apr 6, 2020Updated 5 years ago
- DVI video out example for prjtrellis☆17Jan 20, 2019Updated 7 years ago
- Use amaranth-to-litex to simply import Amaranth code into a Litex project.☆15Apr 22, 2024Updated last year
- ☆21Aug 3, 2024Updated last year
- Simple OS for raspberry pi 2 model B☆13Jun 24, 2017Updated 8 years ago
- fpga co-processor for faster SWD programming☆17Sep 16, 2017Updated 8 years ago
- Full Speed USB DFU interface for FPGA and ASIC designs☆20Mar 10, 2024Updated last year
- SPI flash MITM and emulation (QSPI is a WIP)☆20Jan 27, 2022Updated 4 years ago
- Wraps the NVDLA project for Chipyard integration☆22Sep 2, 2025Updated 6 months ago
- USB capture IP☆25Jun 6, 2020Updated 5 years ago
- NES FPGA implementation synthesized for the ulx3s ecp5 based fpga board☆38Jan 11, 2026Updated last month
- XVCD implementation for ANITA. Note that "ftdi_xvc_core.c" is a generic libftdi-based MPSSE XVC handler, and is awesome.☆18Jul 10, 2020Updated 5 years ago
- This repository contains software for BeagleWire. It is a realization of my project for GSOC-2017☆46Oct 10, 2018Updated 7 years ago
- Utilities to flash Fomu from a Raspberry Pi☆23Jan 26, 2022Updated 4 years ago
- 128KB AXI cache (32-bit in, 256-bit out)☆55May 10, 2021Updated 4 years ago
- The first-ever opensource soft core for PCIE EndPoint. Without vendor-locked HMs for Data Link, Transaction, Application layers. With sta…☆58Feb 24, 2026Updated last week
- Miscellaneous ULX3S examples (advanced)☆83Feb 7, 2026Updated 3 weeks ago
- Utilities for working with a Wishbone bus in an embedded device☆47Aug 29, 2025Updated 6 months ago
- ☆20Jun 18, 2022Updated 3 years ago
- USB 1.1 Host and Function IP core☆25Jul 17, 2014Updated 11 years ago
- 2-layer and 4-layer FPGA development board with ZYNQ 7010/7020 400-pin BGA.☆20Jan 6, 2026Updated last month
- Trivial RISC-V Linux binary bootloader☆55Apr 3, 2021Updated 4 years ago
- Basic USB 1.1 Host Controller for small FPGAs☆97Jun 6, 2020Updated 5 years ago
- USB2Sniffer: High Speed USB 2.0 capture (for LambdaConcept USB2Sniffer hardware)☆59Jun 6, 2020Updated 5 years ago
- Minimig project example for FleaFPGA Ohm Experimenter Board☆27May 17, 2022Updated 3 years ago
- An MPEG2 video decoder, written in Verilog and implemented in an FPGA chip.☆26Apr 24, 2019Updated 6 years ago
- ☆25Sep 29, 2025Updated 5 months ago
- RISC V core implementation using Verilog.☆29Mar 27, 2021Updated 4 years ago