MatejGomboc / Verilog-I2S-TranscieverLinks
I2S transciever implemented in Verilog HDL
☆30Updated 7 years ago
Alternatives and similar repositories for Verilog-I2S-Transciever
Users that are interested in Verilog-I2S-Transciever are comparing it to the libraries listed below
Sorting:
- Audio controller (I2S, SPDIF, DAC)☆86Updated 5 years ago
- USB serial device (CDC-ACM)☆40Updated 5 years ago
- A comparison of 1st and 2nd order sigma delta DAC for FPGA☆59Updated 4 years ago
- Minimal DVI / HDMI Framebuffer☆83Updated 5 years ago
- Basic USB-CDC device core (Verilog)☆80Updated 4 years ago
- Basic USB 1.1 Host Controller for small FPGAs☆91Updated 5 years ago
- DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…☆80Updated last year
- A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm☆116Updated 4 years ago
- ULPI Link Wrapper (USB Phy Interface)☆28Updated 5 years ago
- USB Full Speed PHY☆45Updated 5 years ago
- Small (Q)SPI flash memory programmer in Verilog☆64Updated 2 years ago
- MIPI DSI controller☆79Updated 3 years ago
- Digital Interpolation Techniques Applied to Digital Signal Processing☆62Updated last year
- A tiny example of PCM to PDM pipeline on FPGA☆21Updated 3 years ago
- Implementation and test of reusable sigma-delta A/D converters written in SystemVerilog on a MAX10 FPGA with minimal external components☆71Updated 3 years ago
- DDR3 controller for Tang Primer 20K (Gowin GW2A-18C fpga). DDR3-800 speed and low latency.☆56Updated 2 years ago
- Delta Sigma DAC FPGA☆43Updated 5 months ago
- miniSpartan6+ (Spartan6) FPGA based MP3 Player☆26Updated 5 years ago
- a USB2 highspeed device core, written in amaranth HDL☆50Updated 10 months ago
- assorted library of utility cores for amaranth HDL☆94Updated 10 months ago
- A set of Wishbone Controlled SPI Flash Controllers☆85Updated 2 years ago
- Wishbone controlled I2C controllers☆51Updated 8 months ago
- Digital systems are clocked. This project is about constructing a high-Q clock by simmering an ordinary quartz crystal in a heavy numeric…☆11Updated last week
- An MPEG2 video decoder, written in Verilog and implemented in an FPGA chip.☆25Updated 6 years ago
- SPI-Flash XIP Interface (Verilog)☆40Updated 3 years ago
- Fusesoc compatible rtl cores☆15Updated 2 years ago
- Verilog wishbone components☆117Updated last year
- Open-source high performance AXI4-based HyperRAM memory controller☆75Updated 2 years ago
- Synthesizable SystemVerilog IP-Core of the I2S Receiver☆10Updated 5 years ago
- A collection of phase locked loop (PLL) related projects☆107Updated last year