I2S transciever implemented in Verilog HDL
☆34Oct 11, 2017Updated 8 years ago
Alternatives and similar repositories for Verilog-I2S-Transciever
Users that are interested in Verilog-I2S-Transciever are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Synthesizable SystemVerilog IP-Core of the I2S Receiver☆11Jun 7, 2020Updated 6 years ago
- fork from https://gitee.com/crouchggj/STM32F4_USB_SoundCard☆17Aug 3, 2019Updated 7 years ago
- i2s core, with support for both transmit and receive☆33May 24, 2018Updated 8 years ago
- Open Source Windows UAC2 driver☆21Feb 24, 2013Updated 13 years ago
- 利用ZYNQ7020实现SAR数据采集系统,其中包含硬件设计代码、上位机、测试程序。☆14Feb 27, 2025Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Cheapest UAC2 using STM32F407+USB3300☆22Feb 26, 2025Updated last year
- USB audio interface,design by STM32 and EP4CE6 FPGA,support DSD☆16Jan 20, 2017Updated 9 years ago
- CHEAPEST USB ASYNC AUDIO USING STM32F401RB☆30Mar 17, 2024Updated 2 years ago
- The Faust Online Documentation☆12Updated this week
- Audio controller (I2S, SPDIF, DAC)☆101Sep 1, 2019Updated 7 years ago
- Digital audio equalizer created written in Verilog for Altera DE1 SoC FPGA board.☆12Aug 9, 2019Updated 7 years ago
- 使用stm32f103系列实现的异步声卡,增加了CPLD外部时钟源(不再更新)☆11Feb 8, 2020Updated 6 years ago
- Blink demo for GOWIN FPGA dev kit DK-START-GW1N4☆12Oct 8, 2018Updated 7 years ago
- FPGA-Based USB-Input Audio Digital to Analogue Converter☆17Jun 11, 2021Updated 5 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- Advanced encryption standard (AES) algorithm has been widely deployed in cryptographic applications. This work proposes a low power and h…☆23Apr 15, 2021Updated 5 years ago
- ☆12Oct 20, 2015Updated 10 years ago
- ☆28Jun 7, 2020Updated 6 years ago
- A high-performance DIY audio DAC☆22Aug 16, 2020Updated 6 years ago
- A loader to bypass firmware flashing authentication on cloned Amanero Combo384 USB card☆16Mar 16, 2026Updated 6 months ago
- USB serial device (CDC-ACM)☆49Jun 28, 2020Updated 6 years ago
- A Rust backend crate for the popular card game, Blackjack, designed to also be compiled for linking with C☆11Sep 17, 2019Updated 7 years ago
- Verilog Model for W25Q128JVxIM Serial Flash Memory☆18Jun 7, 2020Updated 6 years ago
- ☆19Feb 10, 2016Updated 10 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- A collection of embedded C code packaged into a library of reusable components and starter examples designed to facilitate customers’ eas…☆28Sep 23, 2024Updated 2 years ago
- Hardware Design and Verification of a configurable and parametrized 50th order low-pass FIR filter starting from MATLAB Modeling to Veril…☆32Mar 4, 2023Updated 3 years ago
- 24-bit Stereo Audio DAC for Raspberry Pi☆60Jan 27, 2020Updated 6 years ago
- Interfacing ZYNQ SoC device with ADC, Transferring data through DMA and LwIP☆62Jun 23, 2021Updated 5 years ago
- Implementation of RSA algorithm on FPGA using Verilog☆27Aug 1, 2018Updated 8 years ago
- ☆35Apr 13, 2022Updated 4 years ago
- use IR positioning camera to get transformation matrix between the object and camera☆12Jul 24, 2017Updated 9 years ago
- ESP32 code for ESP32-A1S. Audio DSP experiments.☆22May 28, 2020Updated 6 years ago
- I2S to S/PDIF conversion on SiPeed Tang Nano (GOWIN GW1N-LV1) which aims to convert Nintendo Switch's internal I2S signal.☆41Aug 15, 2020Updated 6 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Delta Sigma DAC FPGA☆47Feb 21, 2025Updated last year
- FIR implemention with Verilog☆51May 18, 2019Updated 7 years ago
- A small and flexible MPD client that may act as standalone application for an audio system.☆11Apr 17, 2023Updated 3 years ago
- VHDL Modules☆24Mar 16, 2015Updated 11 years ago
- Misc utility FPGA cores☆13Mar 21, 2023Updated 3 years ago
- S/PDIF receiver with support of compressed formats☆10Dec 8, 2024Updated last year
- A LiteX module implementing a USB UAC2 module with simple PDM in/out☆16Feb 16, 2022Updated 4 years ago