ultraembedded / core_ulpi_wrapperLinks
ULPI Link Wrapper (USB Phy Interface)
☆34Updated 5 years ago
Alternatives and similar repositories for core_ulpi_wrapper
Users that are interested in core_ulpi_wrapper are comparing it to the libraries listed below
Sorting:
- USB serial device (CDC-ACM)☆44Updated 5 years ago
- USB Full Speed PHY☆48Updated 5 years ago
- Adapter to use Colorlight i5/i9 FPGA boards in a QMTech board form factor☆20Updated 3 years ago
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆63Updated 7 years ago
- WCH CH569 SerDes Reverse Engineering☆30Updated 3 years ago
- ☆45Updated 3 years ago
- Basic USB 1.1 Host Controller for small FPGAs☆97Updated 5 years ago
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆38Updated last year
- Experimental FPGA project for streaming two MIPI CSI camera streams to an HDMI monitor using a ULX3S FPGA board☆32Updated 2 years ago
- A tiny example of PCM to PDM pipeline on FPGA☆22Updated 3 years ago
- Use an MPSSE FTDI device as a JTAG interface in Quartus tools☆29Updated last year
- A configurable USB 2.0 device core☆32Updated 5 years ago
- Conecting the Litefury FPGA accelerator to Raspberry Pi 5 over PCIe gen2 x1☆37Updated last year
- a USB2 highspeed device core, written in amaranth HDL☆52Updated last year
- This repo is for Efinix Xyloni development board users. It has projects and software to get you started working with the board.☆45Updated 3 years ago
- Nitro USB FPGA core☆86Updated last year
- artix-7 PCIe dev board☆31Updated 8 years ago
- DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…☆86Updated last year
- Delta Sigma DAC FPGA☆47Updated 11 months ago
- Ethernet MAC 10/100 Mbps☆31Updated 4 years ago
- ☆20Updated 3 years ago
- Implementation and test of reusable sigma-delta A/D converters written in SystemVerilog on a MAX10 FPGA with minimal external components☆78Updated 3 years ago
- An MPEG2 video decoder, written in Verilog and implemented in an FPGA chip.☆26Updated 6 years ago
- Minimal DVI / HDMI Framebuffer☆84Updated 5 years ago
- Audio controller (I2S, SPDIF, DAC)☆93Updated 6 years ago
- Use amaranth-to-litex to simply import Amaranth code into a Litex project.☆15Updated last year
- Demo projects for various Kintex FPGA boards☆65Updated 8 months ago
- Time to Digital Converter (TDC)☆36Updated 5 years ago
- Digital FM Radio Receiver for FPGA☆64Updated 10 years ago
- Drop In USB CDC ACM core for iCE40 FPGA☆34Updated 4 years ago