IEEE 802.16 OFDM-based transceiver system
☆34Jul 21, 2019Updated 7 years ago
Alternatives and similar repositories for OFDM_802_16
Users that are interested in OFDM_802_16 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- IEEE 802.11 OFDM-based transceiver system☆49Dec 15, 2017Updated 8 years ago
- Partial Verilog implimentation of a WiMAX OFDM Phy☆19May 28, 2012Updated 14 years ago
- Design a new OFDM synchronization algorithm, and implement it with both Matlab and Verilog.☆21Feb 8, 2017Updated 9 years ago
- PYNQ example of an OFDM Transmitter and Receiver on RFSoC.☆64Jul 16, 2026Updated 2 months ago
- A project demonstrate how to config ad9361 to TX mode☆13Dec 9, 2018Updated 7 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- Zest is a FMC mezzanine board with 8 ADC channels and 2 DACs☆11Nov 6, 2024Updated last year
- ☆22Jun 15, 2022Updated 4 years ago
- Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.☆481Jan 29, 2023Updated 3 years ago
- 通过调试ADRV9009和AD9371对jesd204b知识点作进一步学习和总结☆25Nov 8, 2019Updated 6 years ago
- Verilog实现OFDM基带☆45Jan 22, 2016Updated 10 years ago
- OFDM modem☆16Jul 17, 2014Updated 12 years ago
- "Marble-Mini" Simple FMC carrier board with SFP, 2x FMC, PoE☆23Nov 9, 2021Updated 4 years ago
- SCARV: a side-channel hardened RISC-V platform☆28Jan 11, 2023Updated 3 years ago
- Bit-banged MIPI RFFE control library developed for STM32 HAL platforms☆13May 3, 2019Updated 7 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Verilog RS232 Enhanced Synch-UART & RS232 Debugger HDL core with PC host RS232 real-time Hex-editor / viewer host utility.☆13Jan 15, 2022Updated 4 years ago
- ☆11Nov 14, 2022Updated 3 years ago
- ☆54Nov 20, 2020Updated 5 years ago
- CocoAlma is an execution-aware tool for formal verification of masked implementations☆26Sep 26, 2024Updated last year
- GitHub Repository for iotSDR open source material☆38Feb 28, 2024Updated 2 years ago
- Sources for the GNU Radio hugo website☆14Sep 10, 2026Updated last week
- Roadmap to become a Linux-Fine☆10Jul 13, 2024Updated 2 years ago
- spi memory controller☆24Jan 5, 2017Updated 9 years ago
- 基于MATLAB的OFDM仿真，包含了BPSK、QPSK、QAM调制方式和解调，以及AWGN高斯白噪声信道和TDL信道☆18Jan 31, 2024Updated 2 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- ☆34Jun 11, 2021Updated 5 years ago
- simple qt application that compute Real Time (Real) FFT of Data coming From Serial Port, and Plot Both Raw Data and FFT using QcustomPlot…☆23Aug 21, 2015Updated 11 years ago
- ☆14Jul 27, 2026Updated last month
- IOC for Rockwell - Allen Bradley PLC. (ControlLogix 5000)☆12Apr 22, 2026Updated 4 months ago
- Dual FMC FPGA carrier board developed for general purpose use in particle accelerator electronics instrumentation.☆34Jun 4, 2025Updated last year
- My code repositry for common use.☆23Dec 31, 2021Updated 4 years ago
- Maltlab based software GNSS receiver for Nooelec SDR front ends☆13Mar 4, 2025Updated last year
- soft processor core compatible with i586 instruction set(Intel Pentium) developped on Nexys4 board boots linux kernel with a ramdisk cont…☆35Dec 11, 2016Updated 9 years ago
- An inserted spectrum analyzer based on Zynq-7000, which uses scheme for FPGA+ARM standalone.☆27Apr 30, 2023Updated 3 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- 100BASE-FX Transmitter on RP2040☆24Aug 16, 2024Updated 2 years ago
- Using Software Designed Radio to transmit OFDM QPSK signals at 5 GHz☆205Apr 7, 2018Updated 8 years ago
- An implementation of 5-stages RISC-V CPU☆12Jul 22, 2022Updated 4 years ago
- 学习DRL CNN -> DQN -> LSTM☆13Oct 7, 2018Updated 7 years ago
- Provide / define the INPUT_CLK_HZ parameter and the BHG_FP_clk_divider.v will generate a clock at the specified CLK_OUT_HZ parameter usin…☆22Feb 4, 2025Updated last year
- DSP University Project - Matlab, Simulations, and Verilog Files☆14Jan 14, 2020Updated 6 years ago
- FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)☆150Jul 20, 2026Updated last month