pothosware / PothosZynq

Related projects ⓘ

Alternatives and complementary repositories for PothosZynq

• Xilinx / RFNoC-HLS-ATSC-RX
  ☆26Updated 7 years ago
• EttusResearch / rfnoc-pfb-channelizer
  RFNoC out-of-tree module for a channelizer
  ☆15Updated 6 years ago
• strath-sdr / rfsoc_notebooks
  A collection of RFSoC introductory notebooks for PYNQ.
  ☆19Updated 3 years ago
• myriadrf / LimeSDR-PCIe_GW
  Altera Cyclone IV FPGA project for the PCIe LimeSDR board
  ☆36Updated 2 years ago
• m-labs / jesd204b
  JESD204B core for Migen/MiSoC
  ☆36Updated 3 years ago
• freecores / dvb_s2_ldpc_decoder
  DVB-S2 LDPC Decoder
  ☆25Updated 10 years ago
• yugithub / OFDM-baseband
  Verilog实现OFDM基带
  ☆39Updated 8 years ago
• strath-sdr / rfsoc_qpsk
  PYNQ example of using the RFSoC as a QPSK transceiver.
  ☆91Updated last year
• strath-sdr / rfsoc_ofdm
  PYNQ example of an OFDM Transmitter and Receiver on RFSoC.
  ☆44Updated last year
• wisp / rfid-verilog
  RFID tag and tester in Verilog
  ☆36Updated 11 years ago
• Xilinx / RFNoC-HLS-WINLAB
  ☆16Updated 3 years ago
• aicodix / ira
  SISO vector decoder for IRA-LDPC codes in VHDL
  ☆11Updated 2 years ago
• MicroPhase / antsdr-pynq
  pynq framework for antsdr
  ☆33Updated 5 months ago
• Xilinx / RFSoC2x2-PYNQ
  RFSoC2x2 board repo for PYNQ
  ☆17Updated 2 years ago
• strath-sdr / rfsoc_frequency_planner
  An RFSoC Frequency Planner developed using Python.
  ☆20Updated last year
• MazinLab / RFSoC_OPFB
  A High-Throughput Oversampled Polyphase Filter Bank Using Vivado HLS and PYNQ on a RFSoC
  ☆24Updated 2 months ago
• srsran / zynq_timestamping
  Open source Zynq timestamping implementation from Software Radio Systems (SRS)
  ☆61Updated last year
• ianhchuang / EPC-Gen2-RFID-Tag-Baseband-Processor
  Verilog library of EPC Gen-2 RFID Tag Baseband Processor for IC and FPGA designers
  ☆29Updated 2 years ago
• alexforencich / corundum
  Open source FPGA-based NIC and platform for in-network compute
  ☆58Updated 3 weeks ago
• aoeldemann / fluent10g
  Programmable FPGA-based Network Tester for Multi-10-Gigabit Ethernet
  ☆26Updated 4 years ago
• ucb-ee290c / fa18-modem
  LTE/WiFi/5G-NR SDR Transceiver
  ☆52Updated 5 years ago
• opencpi / opencpi
  Open Component Portability Infrastructure
  ☆58Updated 3 years ago
• strath-sdr / rfsoc_qsfp_offload
  RFSoC QSFP Data Offload Design with GNU Radio
  ☆15Updated this week
• dshekhalev / FEC
  FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)
  ☆87Updated 5 months ago
• OpenDGPS / zynq-axi-dma-sg
  Simple C snippet to transfer DMA memory with scatter/gather on a Zynq 7020
  ☆52Updated 7 years ago
• alexforencich / xfcp
  Extensible FPGA control platform
  ☆54Updated last year
• delhatch / Zynq_UDP
  Transfer data over UDP with a Zedboard. This is an example project that transmits and receives data over UDP.
  ☆22Updated 3 years ago
• strath-sdr / pynq_agc
  Demonstration of Automatic Gain Control with PYNQ
  ☆11Updated 2 years ago
• fpga-soc / mil-std-1553b-soc
  development interface mil-std-1553b for system on chip
  ☆19Updated 6 years ago
• analogdevicesinc / u-boot-xlnx
  The official Xilinx u-boot repository
  ☆15Updated 5 months ago