Alternatives and similar repositories for berkeley-softfloat-3

Users that are interested in berkeley-softfloat-3 are comparing it to the libraries listed below

• camel-cdr / rvv-bench
  A collection of RISC-V Vector (RVV) benchmarks to help developers write portably performant RVV code
  ☆127Updated this week
• riscv-non-isa / riscv-toolchain-conventions
  Documenting the expected behaviour and supported command-line switches for GNU and LLVM based RISC-V toolchains
  ☆152Updated this week
• riscv / riscv-bitmanip
  Working draft of the proposed RISC-V Bitmanipulation extension
  ☆215Updated last year
• bucaps / marss-riscv
  TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems
  ☆157Updated 3 years ago
• riscvarchive / riscv-code-size-reduction
  ☆147Updated last year
• ucb-bar / berkeley-testfloat-3
  TestFloat release 3
  ☆67Updated 6 months ago
• michaeljclark / riscv-disassembler
  RISC-V Disassembler with support for RV32/RV64/RV128 IMAFDC
  ☆100Updated 3 years ago
• nfinit / ansibench
  A selection of ANSI C benchmarks and programs useful as benchmarks
  ☆90Updated last year
• riscv / riscv-p-spec
  RISC-V Packed SIMD Extension
  ☆151Updated last year
• brucehoult / rvv_example
  Simple demonstration of using the RISC-V Vector extension
  ☆47Updated last year
• riscv-admin / riscv-ovpsim
  ☆61Updated 4 years ago
• Jonathan2251 / lbd
  ☆384Updated this week
• ArchC / ArchC
  A powerful and modern open-source architecture description language.
  ☆42Updated 7 years ago
• lowRISC / riscv-llvm
  RISC-V support for LLVM projects (LLVM, Clang, ...)
  ☆273Updated last year
• srokicki / HybridDBT
  ☆33Updated 5 years ago
• riscv-non-isa / riscv-c-api-doc
  Documentation of the RISC-V C API
  ☆77Updated last week
• chipsalliance / dromajo
  RISC-V RV64GC emulator designed for RTL co-simulation
  ☆230Updated 9 months ago
• michaeljclark / riscv-probe
  Simple machine mode program to probe RISC-V control and status registers
  ☆125Updated 2 years ago
• riscv-non-isa / rvv-intrinsic-doc
  ☆345Updated last week
• frasercrmck / llvm-leg
  ☆110Updated 4 years ago
• RALC88 / riscv-vectorized-benchmark-suite
  RiVEC Bencmark Suite
  ☆121Updated 9 months ago
• riscv / riscv-j-extension
  Working Draft of the RISC-V J Extension Specification
  ☆191Updated 2 weeks ago
• csail-csg / riscy-OOO
  RiscyOO: RISC-V Out-of-Order Processor
  ☆162Updated 5 years ago
• michaeljclark / rv8
  RISC-V simulator for x86-64
  ☆709Updated 3 years ago
• camel-cdr / rvv-bench-results
  A collection of RISC-V Vector (RVV) benchmarks to help developers write portably performant RVV code. (Results)
  ☆34Updated this week
• bluespec / Piccolo
  RISC-V CPU, simple 3-stage pipeline, for low-end applications (e.g., embedded, IoT)
  ☆326Updated 3 years ago
• riscv-non-isa / riscv-trace-spec
  RISC-V Processor Trace Specification
  ☆193Updated last month
• t-crest / patmos
  Patmos is a time-predictable VLIW processor, and the processor for the T-CREST project
  ☆145Updated last month
• hlslibs / ac_types
  Algorithmic C Datatypes
  ☆129Updated 3 months ago
• travisdowns / robsize
  ROB size testing utility
  ☆157Updated 3 years ago