Alternatives and similar repositories for berkeley-softfloat-3

Users that are interested in berkeley-softfloat-3 are comparing it to the libraries listed below

• bucaps / marss-riscv
  TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems
  ☆162Updated 3 years ago
• camel-cdr / rvv-bench
  A collection of RISC-V Vector (RVV) benchmarks to help developers write portably performant RVV code
  ☆141Updated last week
• riscv-non-isa / riscv-toolchain-conventions
  Documenting the expected behaviour and supported command-line switches for GNU and LLVM based RISC-V toolchains
  ☆151Updated this week
• riscvarchive / riscv-code-size-reduction
  ☆148Updated last year
• riscv / riscv-bitmanip
  Working draft of the proposed RISC-V Bitmanipulation extension
  ☆216Updated last year
• riscv / riscv-p-spec
  RISC-V Packed SIMD Extension
  ☆157Updated last week
• brucehoult / rvv_example
  Simple demonstration of using the RISC-V Vector extension
  ☆50Updated last year
• larkmjc / riscv-disassembler
  RISC-V Disassembler with support for RV32/RV64/RV128 IMAFDC
  ☆101Updated 3 years ago
• riscv-non-isa / riscv-c-api-doc
  Documentation of the RISC-V C API
  ☆80Updated last week
• chipsalliance / dromajo
  RISC-V RV64GC emulator designed for RTL co-simulation
  ☆238Updated last year
• riscv-non-isa / rvv-intrinsic-doc
  ☆361Updated this week
• dzaima / intrinsics-viewer
  x86-64, ARM, and RVV intrinsics viewer
  ☆76Updated 2 months ago
• ArchC / ArchC
  A powerful and modern open-source architecture description language.
  ☆49Updated 8 years ago
• Jonathan2251 / lbd
  ☆403Updated this week
• riscv-admin / riscv-ovpsim
  ☆61Updated 5 years ago
• ucb-bar / berkeley-testfloat-3
  TestFloat release 3
  ☆73Updated 11 months ago
• riscv / riscv-j-extension
  Working Draft of the RISC-V J Extension Specification
  ☆193Updated last month
• nfinit / ansibench
  A selection of ANSI C benchmarks and programs useful as benchmarks
  ☆99Updated 3 weeks ago
• lowRISC / riscv-llvm
  RISC-V support for LLVM projects (LLVM, Clang, ...)
  ☆277Updated last year
• leros-dev / leros
  A Tiny Processor Core
  ☆114Updated 6 months ago
• csail-csg / riscy-OOO
  RiscyOO: RISC-V Out-of-Order Processor
  ☆170Updated 5 years ago
• bluespec / Piccolo
  RISC-V CPU, simple 3-stage pipeline, for low-end applications (e.g., embedded, IoT)
  ☆331Updated 4 years ago
• t-crest / patmos
  Patmos is a time-predictable VLIW processor, and the processor for the T-CREST project
  ☆153Updated last month
• larkmjc / riscv-probe
  Simple machine mode program to probe RISC-V control and status registers
  ☆127Updated 2 years ago
• bluespec / Toooba
  RISC-V Core; superscalar, out-of-order, multi-core capable; based on RISCY-OOO from MIT
  ☆184Updated 8 months ago
• ultraembedded / exactstep
  Instruction set simulator for RISC-V, MIPS and ARM-v6m
  ☆107Updated 4 years ago
• frasercrmck / llvm-leg
  ☆111Updated 4 years ago
• riscv / riscv-fast-interrupt
  Proposal for a RISC-V Core-Local Interrupt Controller (CLIC)
  ☆286Updated this week
• merledu / nucleusrv
  NucleusRV (rv32-imf) - A 32-bit 5 staged pipelined risc-v core.
  ☆76Updated 3 weeks ago
• grantae / OpenMIPS
  A full implementation of the MIPS32 Release 1 ISA, including virtual memory, TLB, instruction and data caches, interrupts and exceptions,…
  ☆83Updated 6 years ago