Alternatives and similar repositories for riscv-p-spec

Users that are interested in riscv-p-spec are comparing it to the libraries listed below

• riscvarchive / riscv-code-size-reduction
  ☆147Updated last year
• bluespec / Toooba
  RISC-V Core; superscalar, out-of-order, multi-core capable; based on RISCY-OOO from MIT
  ☆177Updated 5 months ago
• chipsalliance / dromajo
  RISC-V RV64GC emulator designed for RTL co-simulation
  ☆233Updated 11 months ago
• ucb-bar / saturn-vectors
  Chisel RISC-V Vector 1.0 Implementation
  ☆115Updated 3 weeks ago
• csail-csg / riscy-OOO
  RiscyOO: RISC-V Out-of-Order Processor
  ☆164Updated 5 years ago
• chipsalliance / riscv-vector-tests
  Unit tests generator for RVV 1.0
  ☆92Updated last month
• ucb-bar / riscv-torture
  RISC-V Torture Test
  ☆200Updated last year
• riscvarchive / riscv-CMOs
  ☆89Updated 2 months ago
• bucaps / marss-riscv
  TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems
  ☆159Updated 3 years ago
• IntelLabs / riscv-vector
  Vector Acceleration IP core for RISC-V*
  ☆184Updated 5 months ago
• openhwgroup / cv32e40x
  4 stage, in-order, compute RISC-V core based on the CV32E40P
  ☆244Updated 11 months ago
• bespoke-silicon-group / bsg_manycore
  Tile based architecture designed for computing efficiency, scalability and generality
  ☆272Updated last month
• RALC88 / riscv-vectorized-benchmark-suite
  RiVEC Bencmark Suite
  ☆122Updated 11 months ago
• riscv-non-isa / riscv-iommu
  RISC-V IOMMU Specification
  ☆137Updated this week
• riscv-non-isa / riscv-trace-spec
  RISC-V Processor Trace Specification
  ☆195Updated 3 weeks ago
• OpenXiangShan / HuanCun
  Open-source high-performance non-blocking cache
  ☆90Updated last month
• riscv-ovpsim / imperas-riscv-tests
  ☆189Updated last year
• ucb-bar / testchipip
  ☆87Updated 4 months ago
• camel-cdr / rvv-bench
  A collection of RISC-V Vector (RVV) benchmarks to help developers write portably performant RVV code
  ☆133Updated last month
• riscv / riscv-aia
  ☆96Updated 2 months ago
• riscv-boom / riscv-coremark
  Setup scripts and files needed to compile CoreMark on RISC-V
  ☆70Updated last year
• ucb-bar / hwacha
  Microarchitecture implementation of the decoupled vector-fetch accelerator
  ☆156Updated last year
• riscv / riscv-bitmanip
  Working draft of the proposed RISC-V Bitmanipulation extension
  ☆214Updated last year
• openhwgroup / cv32e40s
  4 stage, in-order, secure RISC-V core based on the CV32E40P
  ☆150Updated 11 months ago
• riscv / riscv-profiles
  RISC-V Architecture Profiles
  ☆165Updated last month
• tenstorrent / riscv-ocelot
  Ocelot: The Berkeley Out-of-Order Machine With V-EXT support
  ☆188Updated last week
• riscv / riscv-bfloat16
  ☆37Updated last year
• ucb-bar / berkeley-hardfloat
  ☆350Updated last month
• pulp-platform / snitch
  ⛔ DEPRECATED ⛔ Lean but mean RISC-V system!
  ☆226Updated last year
• riscv / riscv-plic-spec
  PLIC Specification
  ☆149Updated 2 months ago