Verilog极简教程
☆36Apr 7, 2019Updated 7 years ago
Alternatives and similar repositories for verilog-mini-demo
Users that are interested in verilog-mini-demo are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- RTL Verilog library for various DSP modules☆96Feb 17, 2022Updated 4 years ago
- This IP provides a bridge between UART signals and the Advanced Microcontroller Bus Architecture (AMBA®) AXI4 Lite interface.☆24Nov 7, 2018Updated 7 years ago
- RISC-V ASIC design reference☆10May 8, 2018Updated 8 years ago
- http://os.cs.tsinghua.edu.cn/research/undergraduate/zwpu2019☆12Jun 7, 2019Updated 6 years ago
- TerosHDL documentation☆13Jul 27, 2025Updated 9 months ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- This is a demo for still image compression application☆14Apr 14, 2018Updated 8 years ago
- asynchronous fifo based on verilog☆15Apr 14, 2022Updated 4 years ago
- Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"☆43Jan 8, 2021Updated 5 years ago
- UVM examples☆14May 1, 2015Updated 11 years ago
- implementing a Recurrent Neural Network with binarized weight format on FPGA☆22Sep 3, 2017Updated 8 years ago
- this repository is vim cfg for verilog.☆55Apr 24, 2026Updated 2 weeks ago
- ☆10Mar 11, 2018Updated 8 years ago
- ☆13Apr 24, 2015Updated 11 years ago
- UVM candy lover testbench which uses YASA as simulation script☆17Apr 17, 2020Updated 6 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Designing and implementing LZ4 decompression algorithm in hardware (FPGA) using Verilog hardware description language☆17Feb 20, 2019Updated 7 years ago
- This repository provides the IEEE 1685 IP-XACT schema files for a Git submodule integration.☆20May 12, 2025Updated 11 months ago
- ☆18Apr 5, 2015Updated 11 years ago
- The verilog code together with cocotb testbench of BFU unit of a DIF FFT processor☆15Apr 11, 2023Updated 3 years ago
- Barerbones OSX based Verilog simulation toolchain.☆20Nov 1, 2020Updated 5 years ago
- svlib from http://www.verilab.com/resources/svlib/☆26Jun 2, 2020Updated 5 years ago
- A MCU implementation based PODES-M0O☆19Jan 31, 2020Updated 6 years ago
- ☆19Mar 6, 2020Updated 6 years ago
- ☆13Jun 4, 2020Updated 5 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- achieve softmax in PYNQ with heterogeneous computing.☆14Nov 1, 2018Updated 7 years ago
- ☆11May 24, 2019Updated 6 years ago
- Verilog实现OFDM基带☆45Jan 22, 2016Updated 10 years ago
- Use OpenCV to convert a raw bayer image from a sensor to rgb☆12Apr 2, 2011Updated 15 years ago
- maskcnn_benchmark based on mobilenetv2☆12Nov 11, 2019Updated 6 years ago
- 异步FIFO的内部实现☆25Aug 26, 2018Updated 7 years ago
- gateware for the main fpga, including a hispi decoder and image processing☆13Sep 27, 2018Updated 7 years ago
- ☆29Dec 12, 2025Updated 4 months ago
- ☆16Sep 26, 2022Updated 3 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- Xilinx IP repository☆13May 5, 2018Updated 8 years ago
- MTCNN with convolution reprogramed in c☆14Jul 25, 2019Updated 6 years ago
- ☆31Aug 8, 2020Updated 5 years ago
- Xilinx Virtual Cable server written in python connecting Xilinx with different JTAG adapters☆11Dec 20, 2013Updated 12 years ago
- ☆14Dec 15, 2017Updated 8 years ago
- Generic AHB master stub☆12Jul 17, 2014Updated 11 years ago
- ☆15Jun 14, 2022Updated 3 years ago