fffasttime / MRFILinks
☆16Updated 9 months ago
Alternatives and similar repositories for MRFI
Users that are interested in MRFI are comparing it to the libraries listed below
Sorting:
- Fast Emulation of Approximate DNN Accelerators in PyTorch☆29Updated last year
- A collection of research papers on SRAM-based compute-in-memory architectures.☆30Updated 2 years ago
- ☆10Updated last year
- ☆18Updated last year
- Code of "Eva-CiM: A System-Level Performance and Energy Evaluation Framework for Computing-in-Memory Architectures", TCAD 2020☆13Updated 4 years ago
- ☆73Updated 11 months ago
- Accelerate multihead attention transformer model using HLS for FPGA☆11Updated 2 years ago
- ☆58Updated last year
- Attentionlego☆12Updated 2 years ago
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆84Updated 4 years ago
- A Unified Framework for Training, Mapping and Simulation of ReRAM-Based Convolutional Neural Network Acceleration☆36Updated 3 years ago
- a Computing In Memory emULATOR framework☆15Updated last year
- An HLS based winograd systolic CNN accelerator☆54Updated 4 years ago
- ☆20Updated last year
- Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)☆73Updated 2 years ago
- A list of our chiplet simulaters☆48Updated 7 months ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)☆76Updated 11 months ago
- ☆57Updated 2 months ago
- A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching☆74Updated 3 months ago
- ☆12Updated 10 months ago
- An FPGA Accelerator for Transformer Inference☆93Updated 3 years ago
- ☆32Updated 10 months ago
- [ASAP 2020; FPGA 2020] Hardware architecture to accelerate GNNs (common IP modules for minibatch training and full batch inference)☆43Updated 4 years ago
- Stochastic Computing for Deep Neural Networks☆33Updated 5 years ago
- [TVLSI 2025] ACiM Inference Simulation Framework in "ASiM: Modeling and Analyzing Inference Accuracy of SRAM-Based Analog CiM Circuits"☆25Updated 5 months ago
- Automatic generation of FPGA-based learning accelerators for the neural network family☆68Updated 6 years ago
- Collection of kernel accelerators optimised for LLM execution☆26Updated 2 months ago
- A comprehensive tool that allows for system-level performance estimation of chiplet-based In-Memory computing (IMC) architectures.☆23Updated last year
- [ASPLOS 2024] CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators☆45Updated last year
- [TCAD'23] AccelTran: A Sparsity-Aware Accelerator for Transformers☆56Updated 2 years ago