SrikanthPagadarai / gr-dpd
DPD using RLS Algorithm
☆12Updated 6 years ago
Related projects ⓘ
Alternatives and complementary repositories for gr-dpd
- Polar Codes Implementation on Vhdl☆12Updated 8 years ago
- A matlab implementation of the 802.11n LDPC encoder and decoder☆60Updated 3 years ago
- Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…☆53Updated last year
- Using Software Designed Radio to transmit OFDM QPSK signals at 5 GHz☆161Updated 6 years ago
- ☆12Updated 4 years ago
- Matlab simulations of the encoder and decoder for the New Radio LDPC code from 3GPP Release 15☆44Updated 3 years ago
- Symbol Timing Synchronization Simulation☆57Updated 2 years ago
- FEC Codec IP core library for a some famous codes (BCH, RS, LDPC, Turbo)☆86Updated 4 months ago
- Using Software Designed Radio to transmit MIMO-OFDM QPSK signals at 5 GHz☆87Updated 6 years ago
- 5g ldpc codes☆103Updated 5 years ago
- ☆42Updated last year
- - Designed the LDPC decoder in the Matlab using the min-sum approach. - Designed quantized RTL in Verilog with the min-sum approach and …☆44Updated 7 years ago
- List of open source channel coding projects and libraries.☆112Updated 2 years ago
- CUDA implementation of LDPC decoding algorithm☆35Updated 3 years ago
- matlab☆13Updated 6 years ago
- NMS_decode☆11Updated 4 years ago
- PYNQ example of using the RFSoC as a QPSK transceiver.☆90Updated last year
- Matlab simulations of the encoder and decoder for the LTE turbo code from 3GPP Release 15☆48Updated 3 years ago
- Polar Codes MatLab☆17Updated 7 years ago
- IEEE 802.11 OFDM-based transceiver system☆30Updated 6 years ago
- Playing with Low-density parity-check codes☆88Updated last year
- Matlab simulations of the encoder and SCL decoder for the New Radio polar code from 3GPP Release 15☆118Updated 3 years ago
- An efficient implementation of the Viterbi decoding algorithm in Verilog☆44Updated 7 months ago
- C and MATLAB implementation for LDPC encoding and decoding☆184Updated 7 years ago
- LDPC编码解码matlab代码和Verilog代码及资料☆41Updated 6 years ago
- This project aims to implement a digital predistortion algorithm for power amplifier linearizion using vhdl. It contains VHDL design for …☆16Updated last year
- MATLAB implementation of a transmitter and receiver chain of the 5G NR Physical Uplink Shared Channel (PUSCH) defined by 3GPP rel 15.☆74Updated 2 years ago
- Verilog实现OFDM基带☆39Updated 8 years ago
- Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.☆101Updated 11 months ago
- Full piplined LDPC decoder (IEEE 802.16e) implement in FPGA using Xilinx HLS(C synthesis to Verilog Codes)..☆36Updated 5 years ago