Full Support 32bit RISC-V in LLVM and CLANG for Vector Extension
☆43Dec 21, 2020Updated 5 years ago
Alternatives and similar repositories for llvm-rv
Users that are interested in llvm-rv are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆10Sep 1, 2020Updated 5 years ago
- PLCT实验室 rvv-llvm 实现配套的 benchmark / testcases☆21Nov 26, 2020Updated 5 years ago
- PLCT实验室的 RISC-V V Spec 实现，基于llvm/llvm-project，rkruppe/rvv-llvm 和 https://repo.hca.bsc.es/gitlab/rferrer/llvm-epi-0.8☆160Sep 3, 2025Updated 7 months ago
- Density test bench for RISCV - "Compress extension"☆15Jun 21, 2021Updated 4 years ago
- GNU toolchain for RISC-V, including GCC☆14Mar 21, 2024Updated 2 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- ☆15Oct 2, 2023Updated 2 years ago
- Implements kernels with RISC-V Vector☆22Mar 24, 2023Updated 3 years ago
- PLCT实验室维护的QEMU仓库。代码放在 plct- 前缀的分支里。☆30Sep 18, 2025Updated 7 months ago
- RuyiSDK Package Manager☆39Apr 23, 2026Updated last week
- a c89 compiler, need total test.☆29Jan 20, 2018Updated 8 years ago
- The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github…☆31Updated this week
- Security Test Benchmark for Computer Architectures☆20Sep 24, 2025Updated 7 months ago
- KernelFaRer: Replacing Native-Code Idioms with High-Performance Library Calls☆12Sep 7, 2025Updated 7 months ago
- Example of RISC-V Vector programming☆28Sep 4, 2025Updated 7 months ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Working draft of the proposed RISC-V V vector extension☆1,077Mar 17, 2024Updated 2 years ago
- Bountysource browser extension.☆14Nov 17, 2016Updated 9 years ago
- Vector processor for RISC-V vector ISA☆139Oct 19, 2020Updated 5 years ago
- a Halide language To MLIR compiler.☆26Aug 30, 2021Updated 4 years ago
- Chunky Loop Interaction☆25Aug 13, 2019Updated 6 years ago
- MLIRX is now defunct. Please see PolyBlocks - https://docs.polymagelabs.com☆38Dec 1, 2023Updated 2 years ago
- Translate RISC-V Vector Assembly from v1.0 to v0.7☆36Aug 21, 2024Updated last year
- Nuclei AI Library Optimized For RISC-V Vector☆15Oct 15, 2025Updated 6 months ago
- Basic start of TensorFlow with TensorBoard☆11Apr 9, 2016Updated 10 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- A PyTorch native platform for training generative AI models☆17Apr 21, 2026Updated last week
- Simple and clear project management tool. With which it is possible to display one or more projects graphically.☆15Jan 13, 2025Updated last year
- MIPS 57条指令五级流水线cpu (verilog实现+详细注释)☆11Jan 11, 2022Updated 4 years ago
- ☆204Aug 30, 2021Updated 4 years ago
- LLM Agent for Hardware Description Language☆22Jun 7, 2025Updated 10 months ago
- A SystemVerilog-based simulation and design of a Last Level Cache (LLC) implementing the MESI protocol, featuring Pseudo-LRU replacement,…☆16Mar 8, 2026Updated last month
- npx vincent0700-cli☆15Jun 1, 2021Updated 4 years ago
- A matrix extension proposal for AI applications under RISC-V architecture☆181Apr 1, 2026Updated last month
- A blog for LLVM(v11.0.0) beginner, step by step, with detailed documents and comments. Record the way I learn LLVM.☆14Jun 17, 2022Updated 3 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Original test vector of RISC-V Vector Extension☆14Mar 23, 2021Updated 5 years ago
- 💻 C++ 由简及繁，学习历程☆13Nov 1, 2021Updated 4 years ago
- ☆14Sep 20, 2017Updated 8 years ago
- TEMPORARY FORK of the riscv-compliance repository☆34Mar 31, 2021Updated 5 years ago
- The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 …☆511Updated this week
- MIAOW2.0 FPGA implementable design☆12Oct 18, 2017Updated 8 years ago
- Unit tests generator for RVV 1.0☆106Nov 11, 2025Updated 5 months ago