复微杯
☆18Aug 7, 2024Updated 2 years ago
Alternatives and similar repositories for My_Noc
Users that are interested in My_Noc are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆35Jul 9, 2025Updated last year
- A Convolutional Neural Network Accelerator implementation on FPGA, xilinx （xczu7ev-ffvc1156-2-i）, The inference of yolov8 took 60ms.☆583Jul 17, 2025Updated last year
- ☆10Dec 15, 2023Updated 2 years ago
- Pipelined Processor which implements RV32i Instruction Set. Also contains pipelined L1 4-way set-associative Instruction Cache, direct-ma…☆15Dec 23, 2022Updated 3 years ago
- Deploy llama2.c on the OpenLA500 SoC with custom AI accelerator (FPGA)☆24Jun 16, 2026Updated 4 months ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- This is my hobby project with System Verilog to accelerate LeViT Network which contain CNN and Attention layer.☆41Aug 13, 2024Updated 2 years ago
- ☆14Jun 29, 2026Updated 4 months ago
- ☆11Jun 28, 2020Updated 6 years ago
- OpenExSys_NoC a mesh-based network on chip IP.☆21Dec 1, 2023Updated 2 years ago
- FPGA-based SNN Accelerator Toy☆50Apr 17, 2026Updated 6 months ago
- [TECS'23] A project on the co-design of Accelerators and CNNs.☆21Dec 10, 2022Updated 3 years ago
- General Purpose AXI Direct Memory Access☆82May 12, 2024Updated 2 years ago
- Network on Chip Implementation written in SytemVerilog☆215Aug 27, 2022Updated 4 years ago
- 包含了SOC设计中的通用IP，如外设、总线结构、基础、验证等☆152Sep 17, 2026Updated last month
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- Write a CPU from scratch! (5-stage pipeline & 2-way-cache)☆20Jul 18, 2019Updated 7 years ago
- Secure and Fast FPGA-based Hardware Scheduler for Accelerating Task Scheduling in Multi-core Systems☆13Apr 25, 2023Updated 3 years ago
- SystemVerilog AXI verification library and video-DMA IP: AXI4/Lite/Stream BFMs, triple-buffer VDMA, and multi-tap temporal VDMA with byte…☆30Jul 5, 2026Updated 3 months ago
- 2025年全国大学生嵌入式芯片与系统设计竞赛 FPGA创新设计赛道 安路二赛题 国家级一等奖☆55Oct 17, 2026Updated last week
- Open-source RTL IP developement for IIR/FIR filters in SystemVerilog, along with the C model and verification IP in UVM☆15Jul 8, 2026Updated 3 months ago
- 大三上做的本科毕设，包含BNN的替代梯度训练，verilog电路实现，完成180nm工艺流片。☆29Jun 30, 2025Updated last year
- mirror of https://git.elphel.com/Elphel/x393_sata☆37May 12, 2020Updated 6 years ago
- SystemVerilog Implementations of CUDA/TensorCore/TPU GEMM Operations☆22Apr 12, 2026Updated 6 months ago
- ESnet general-purpose FPGA design library.☆14Oct 21, 2026Updated last week
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- 基于易灵思Ti60F225开发板和MT9M001双目摄像头，使用Verilog语言完成的双目拼接项目。摄像头输入图像数据后，在使用FAST计算图像特征点的同时，构建滑动窗口计算图像各个像素点的BRIEF描述符，完成后根据BRIEF描述符对两幅图像上的特征点进行暴力匹配，最后…☆24Apr 16, 2025Updated last year
- 128KB AXI cache (32-bit in, 256-bit out)☆58May 10, 2021Updated 5 years ago
- FPGA referrence implementation for aion equihash 2109☆17Aug 1, 2018Updated 8 years ago
- Design a Low-cost-AI-Accelerator based on Google's Tensor Processing Unit Version 1 in TSMC 16nm☆23Sep 27, 2026Updated last month
- Low Density Parity Check Decoder☆19Sep 12, 2016Updated 10 years ago
- APB Timer Unit☆14Oct 30, 2025Updated 11 months ago
- Accelerator for LLM Based on Chisel3☆15Jul 16, 2026Updated 3 months ago
- Used FPGA board and System Verilog to design controller, DMA, pipelined SIMD processor, and GEMM accelerator☆13Aug 26, 2023Updated 3 years ago
- An Open-Source Processor for Accelerating Spiking Neural Network☆13Sep 30, 2022Updated 4 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Xilinx ZynqMP AXI-ACP Adapter☆21May 18, 2026Updated 5 months ago
- Ultra High Performance AXI4-based Direct Memory Access (DMA) Controller. This project was an interview assignment. Work in Progress.☆21Aug 14, 2026Updated 2 months ago
- vector accelerating unit☆37Dec 1, 2020Updated 5 years ago
- ☆15Oct 26, 2023Updated 3 years ago
- Large-scale 2D mesh system with dedicated GeMM, on-chip RDMA and Rendez-vous accelerators.☆29Updated this week
- ☆28Sep 19, 2026Updated last month
- This is a simple Risc-v core for software simulation on FPGA.☆10Apr 9, 2022Updated 4 years ago