📦 Prebuilt RISC-V GCC toolchains for x64 Linux.
☆106Feb 22, 2025Updated last year
Alternatives and similar repositories for riscv-gcc-prebuilt
Users that are interested in riscv-gcc-prebuilt are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Port of the LLVM compiler infrastructure to the time-predictable processor Patmos☆15Apr 2, 2025Updated last year
- 6-stage dual-issue in-order superscalar risc-v cpu☆14Apr 10, 2026Updated last week
- ✔️ Port of RISCOF to check NEORV32 for RISC-V ISA compatibility.☆39Feb 22, 2026Updated last month
- Description of a RISC-V architecture based on MIPS 3000☆14Apr 24, 2023Updated 2 years ago
- Hardware implementation of the SipHash short-inout PRF☆17Apr 3, 2025Updated last year
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- RISC-V emulator in C☆33Jun 8, 2021Updated 4 years ago
- LinuxCNC FPGA board port to LiteX☆33Jan 24, 2025Updated last year
- RISC-V RV64IS-compatible processor for the Kestrel-3☆21Feb 24, 2023Updated 3 years ago
- ☆13Aug 7, 2025Updated 8 months ago
- 🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independe…☆2,027Apr 6, 2026Updated last week
- A Goldschmidt integer divider written in verilog. Similar to Newton-Raphson but the divison step can be pipelined.☆16Apr 25, 2024Updated last year
- Integer Multiplier Generator for Verilog☆24Jul 4, 2025Updated 9 months ago
- The RISC-V Architectural Certification Tests (ACTs) are a set of assembly language tests designed to certify that a design faithfully imp…☆670Updated this week
- A new kind of hardware decompressor for Snappy decompression. Much faster than the existing software one.☆24Jun 27, 2023Updated 2 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- Design implementation of the RV32I Core in Verilog HDL with Zicsr extension☆126Dec 17, 2023Updated 2 years ago
- RISC-V Cores, SoC platforms and SoCs☆920Mar 26, 2021Updated 5 years ago
- The RISC-V External Debug Security Specification☆20Apr 6, 2026Updated last week
- GNU toolchain for RISC-V, including GCC☆4,433Apr 5, 2026Updated last week
- ☆17May 4, 2020Updated 5 years ago
- Verdi like, verilog code signal trace and show hierarchy script☆19Oct 16, 2019Updated 6 years ago
- Super scalar Processor design☆21Sep 7, 2014Updated 11 years ago
- 📁 NEORV32 projects and exemplary setups for various FPGAs, boards and (open-source) toolchains.☆90Apr 6, 2026Updated last week
- Vision Space Technologies PC104 boards☆25Nov 10, 2021Updated 4 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- An unnecessarily tiny and minimal implementation of GPT-2 in NumPy.☆11Feb 12, 2023Updated 3 years ago
- MMC (and derivative standards) host controller☆25Sep 14, 2020Updated 5 years ago
- ☆27Jul 27, 2017Updated 8 years ago
- Documentation for RISC-V Spike☆105Oct 18, 2018Updated 7 years ago
- Run Linux on RISC-V Spike Simulator☆67Nov 21, 2025Updated 4 months ago
- Dye cell files for a DIY dye laser☆16May 21, 2023Updated 2 years ago
- RISC-V Scratchpad☆76Nov 18, 2022Updated 3 years ago
- ☆1,153Mar 24, 2026Updated 3 weeks ago
- ☆11Jan 9, 2021Updated 5 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- ☆200Dec 14, 2023Updated 2 years ago
- Side-channel analysis setup for OpenTitan☆38Nov 3, 2025Updated 5 months ago
- Blazingly fast, modern C++ API using coroutines for efficient RTL verification and co-simulation via the VPI interface☆17Mar 10, 2026Updated last month
- ARTICo³ - Dynamic and Partially Reconfigurable Architecture for Run-Time Adaptive, High Performance Embedded Computing☆12Sep 10, 2024Updated last year
- FPGA acceleration of arbitrary precision floating point computations.☆40May 17, 2022Updated 3 years ago
- Quick'n'dirty FuseSoC+cocotb example☆19Nov 26, 2024Updated last year
- PicoRV32 - A Size-Optimized RISC-V CPU☆4,092Jun 27, 2024Updated last year