π² A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC).
β215Nov 26, 2025Updated 3 months ago
Alternatives and similar repositories for neoTRNG
Users that are interested in neoTRNG are comparing it to the libraries listed below
Sorting:
- Technology-agnostic Physical Unclonable Function (PUF) hardware module for any FPGA.β139Nov 5, 2022Updated 3 years ago
- True Random Number Generator core implemented in Verilog.β81Oct 8, 2020Updated 5 years ago
- π₯οΈ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independeβ¦β1,999Updated this week
- Baseband Receiver IP for GPS like DSSS signalsβ40May 19, 2020Updated 5 years ago
- An OpenRISC 1000 multi-core virtual platform based on SystemC/TLMβ15Mar 25, 2025Updated 11 months ago
- VHDLproc is a VHDL preprocessorβ24May 12, 2022Updated 3 years ago
- Library of reusable VHDL componentsβ28Mar 7, 2024Updated 2 years ago
- Small footprint and configurable Inter-Chip communication coresβ66Feb 20, 2026Updated 2 weeks ago
- Bitfiltrator: A general approach for reverse-engineering Xilinx bitstream formatsβ49Apr 8, 2023Updated 2 years ago
- general-coresβ21Jul 16, 2025Updated 7 months ago
- β10Apr 8, 2021Updated 4 years ago
- A true random number generator with ring oscillators structure written in VHDL targeting FPGA's.β11Sep 22, 2020Updated 5 years ago
- Experiments with Cologne Chip's GateMate FPGA architectureβ17Nov 16, 2023Updated 2 years ago
- Repository containing the DSP gateware coresβ14Feb 6, 2026Updated last month
- Framework based on Partial Reconfiguration for chip characterization utilizing ring-oscillator PUFsβ13Apr 1, 2020Updated 5 years ago
- SERV - The SErial RISC-V CPUβ1,761Feb 19, 2026Updated 2 weeks ago
- Generate symbols from HDL components/modulesβ22Feb 6, 2023Updated 3 years ago
- A collection of big designs to run post-synthesis simulations with yosysβ51Oct 27, 2015Updated 10 years ago
- IEEE 754 single precision floating point library in systemverilog and vhdl