π² A Tiny and Platform-Independent True Random Number Generator for any FPGA (and ASIC).
β220May 7, 2026Updated last month
Alternatives and similar repositories for neoTRNG
Users that are interested in neoTRNG are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Technology-agnostic Physical Unclonable Function (PUF) hardware module for any FPGA.β143Nov 5, 2022Updated 3 years ago
- True Random Number Generator core implemented in Verilog.β85Oct 8, 2020Updated 5 years ago
- π₯οΈ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independeβ¦β2,143Updated this week
- Reference implementation for the COherent Sampling ring Oscillator based True Random Number Generator.β14Nov 26, 2024Updated last year
- π Add capacitive touch buttons to any FPGA!β104Mar 4, 2022Updated 4 years ago
- Deploy on Railway without the complexity - Free Credits Offer β’ AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- β10Apr 8, 2021Updated 5 years ago
- A VHDL IP for ECC (Elliptic Curve Cryptography) hardware accelerationβ47Nov 24, 2025Updated 6 months ago
- A true random number generator with ring oscillators structure written in VHDL targeting FPGA's.β12Sep 22, 2020Updated 5 years ago
- VHDLproc is a VHDL preprocessorβ24May 12, 2022Updated 4 years ago
- Library of reusable VHDL componentsβ28Mar 7, 2024Updated 2 years ago
- Experiments with Cologne Chip's GateMate FPGA architectureβ19Nov 16, 2023Updated 2 years ago
- Open-source implementations of reference Physical True Random Number Generators (TRNG or PTRNG) based on ring oscillators.β17Mar 26, 2026Updated 2 months ago
- Bitfiltrator: A general approach for reverse-engineering Xilinx bitstream formatsβ52Apr 8, 2023Updated 3 years ago
- general-coresβ21Jul 16, 2025Updated 11 months ago
- Managed Kubernetes at scale on DigitalOcean β’ AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Generate symbols from HDL components/modulesβ22Feb 6, 2023Updated 3 years ago
- Framework based on Partial Reconfiguration for chip characterization utilizing ring-oscillator PUFsβ14Apr 1, 2020Updated 6 years ago
- SERV - The SErial RISC-V CPUβ1,812Feb 19, 2026Updated 4 months ago
- Multi-platform nightly builds of open source FPGA toolsβ306Nov 3, 2021Updated 4 years ago
- A huge VHDL library for FPGA and digital ASIC developmentβ465Updated this week
- An OpenRISC 1000 multi-core virtual platform based on SystemC/TLMβ17Mar 25, 2025Updated last year
- Baseband Receiver IP for GPS like DSSS signalsβ41May 19, 2020Updated 6 years ago
- Benchmark suite for real-time behavior, including interrupt latency and context switching timesβ15Oct 20, 2021Updated 4 years ago
- RISCV CPU implementation in SystemVerilogβ32Jun 7, 2026Updated last week
- Managed Database hosting by DigitalOcean β’ AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Examples and design pattern for VHDL verificationβ15Apr 10, 2016Updated 10 years ago
- π₯ Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.β33Aug 20, 2022Updated 3 years ago
- Tests to evaluate the support of VHDL 2008 and VHDL 2019 featuresβ32Jan 30, 2025Updated last year
- Silice is an easy-to-learn, powerful hardware description language, that simplifies designing hardware algorithms with parallelism and piβ¦β1,418Jun 5, 2026Updated 2 weeks ago
- An all-digital GPS disciplined oscillator using MMCM phase shift.β33Sep 1, 2022Updated 3 years ago
- VHDL Implementation of AES Algorithmβ93Jul 29, 2021Updated 4 years ago
- Limited python / cocotb interface to Xilinx/AMD Vivado simulator.β77Feb 18, 2026Updated 4 months ago
- Small footprint and configurable Inter-Chip communication coresβ66Updated this week
- A bit-serial CPUβ20Sep 29, 2019Updated 6 years ago
- Managed hosting for WordPress and PHP on Cloudways β’ AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- IEEE 754 single precision floating point library in systemverilog and vhdlβ41Apr 28, 2026Updated last month
- RISC-V Nox coreβ73Jul 22, 2025Updated 10 months ago
- Basic Pong you can extend with rotary, sound, vga generator and autopilotβ11Oct 26, 2021Updated 4 years ago
- VHDL compiler and simulatorβ839Updated this week
- Repository containing the DSP gateware coresβ14Mar 9, 2026Updated 3 months ago
- An abstract language model of VHDL written in Python.β64May 11, 2026Updated last month
- Single/Multi-channel Full Speed USB interface for FPGA and ASIC designsβ190Mar 10, 2024Updated 2 years ago