☆21Jan 25, 2018Updated 8 years ago
Alternatives and similar repositories for tinyAES
Users that are interested in tinyAES are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A basic implementation of a SAT attack on logic locking.☆13Jun 30, 2021Updated 5 years ago
- ECDSA VHDL Implementation☆12Apr 6, 2018Updated 8 years ago
- Random Generator of Btor2 Files☆10Sep 2, 2023Updated 3 years ago
- ☆23Mar 13, 2023Updated 3 years ago
- A copy of the latest version of MVSIS☆13Apr 18, 2021Updated 5 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Source-Opened RISCV for Crypto☆18Jan 18, 2022Updated 4 years ago
- A Coq framework to support structural design and proof of hardware cache-coherence protocols☆15May 7, 2022Updated 4 years ago
- Gabes: Garbled Circuits in Python☆16Feb 7, 2023Updated 3 years ago
- Iodine: Verifying Constant-Time Execution of Hardware☆18Mar 29, 2021Updated 5 years ago
- A fork of Yosys that integrates the CellIFT pass☆14Sep 12, 2026Updated last week
- SystemVerilog package for reading, manipulating, and writing JSON-formatted data☆12Feb 19, 2022Updated 4 years ago
- ☆15Feb 6, 2021Updated 5 years ago
- ☆17Jan 5, 2022Updated 4 years ago
- Implementation of the Advanced Encryption Standard in Chisel☆19Apr 18, 2022Updated 4 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- A synthesis flow for hybrid processing-in-RRAM modes☆12Jul 15, 2021Updated 5 years ago
- SystemVerilog RTL and UVM RAL model generators for RgGen☆17Jul 1, 2026Updated 2 months ago
- Java library for parsing and manipulating graph representations of gate-level Verilog netlists☆15Jan 9, 2017Updated 9 years ago
- ☆27Apr 14, 2026Updated 5 months ago
- Circuit Synthesis for Yao's Garbled Circuit by TinyGarble☆11Sep 25, 2020Updated 5 years ago
- Libre Silicon Compiler☆22Apr 13, 2021Updated 5 years ago
- Learning data structures and algorithms☆10Sep 13, 2021Updated 5 years ago
- ☆18Jul 12, 2024Updated 2 years ago
- SystemVerilog Linter based on pyslang☆33May 5, 2025Updated last year
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- ☆18Jul 11, 2021Updated 5 years ago
- ☆14Apr 29, 2024Updated 2 years ago
- BGN encryption scheme implementation using Go☆16Sep 5, 2020Updated 6 years ago
- Code repository for Coppelia tool☆22Nov 12, 2020Updated 5 years ago
- Project Repo for the Simulator Independent Coverage Research☆21Feb 28, 2023Updated 3 years ago
- CrazyDiskInfo is an interactive TUI S.M.A.R.T viewer for Unix systems.☆10Aug 9, 2022Updated 4 years ago
- Implementation VexRiscv on ultra96☆14Apr 18, 2022Updated 4 years ago
- ☆21Jun 12, 2024Updated 2 years ago
- A standalone plugin lazy loader for Neovim☆13May 19, 2023Updated 3 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Cryptoleq: A Heterogeneous Abstract Machine for Encrypted and Unencrypted Computation.☆31Aug 20, 2024Updated 2 years ago
- A soft multimedia/graphics processor prototype in Chisel 3☆11May 3, 2023Updated 3 years ago
- ☆17Feb 9, 2022Updated 4 years ago
- bil verification tool☆12Jun 30, 2022Updated 4 years ago
- Rapidly deploy Chisel and Vivado HLS accelerators on Xilinx PYNQ☆34Sep 19, 2018Updated 8 years ago
- ☆14Jun 20, 2026Updated 3 months ago
- Extends bevy_replicon with attribute-based visibility control☆11Apr 27, 2025Updated last year