isec-tugraz / coco-alma
CocoAlma is an execution-aware tool for formal verification of masked implementations
☆21Updated 7 months ago
Alternatives and similar repositories for coco-alma:
Users that are interested in coco-alma are comparing it to the libraries listed below
- Side-channel analysis setup for OpenTitan☆31Updated last week
- This repository contains the verification suite for verifying Berkeley Out-of-Order Machine (BOOM) against transient execution attacks ba…☆17Updated 2 years ago
- The SpinalHDL design of the Proteus core, an extensible RISC-V core.☆53Updated last week
- Integer Multiplier Generator for Verilog☆22Updated last year
- Microarchitectural control flow integrity (𝜇CFI) verification checks whether there exists a control or data flow from instruction's ope…☆12Updated 2 months ago
- High-speed full CRYSTALS-DILITHIUM implementation on FPGA: Keygen, Sign, Verify.☆52Updated 2 years ago
- CoPHEE is a Co-processor for Partially Homomorphic Encrypted Encryption.☆31Updated last year
- SMT Attack☆21Updated 4 years ago
- A list of VHDL codes implementing cryptographic algorithms☆26Updated 3 years ago
- Hardware Formal Verification☆15Updated 4 years ago
- NIST LWC Hardware Design of Ascon with Protection against Power Side-Channel Attacks☆17Updated 2 years ago
- [HISTORICAL] A Lightweight (RISC-V) ISA Extension for AES and SM4☆36Updated 4 years ago
- PROLEAD - A Probing-Based Leakage Detection Tool for Hardware and Software☆39Updated last week
- ☆80Updated last year
- Methodology that leverages FPV to automatically discover covert channels in hardware that is time-shared between processes. AutoCC operat…☆17Updated 6 months ago
- SILVER - Statistical Independence and Leakage Verification☆14Updated 2 years ago
- NIST LWC Hardware Reference Implementation of Ascon v1.2☆26Updated last year
- SCARV: a side-channel hardened RISC-V platform☆18Updated 4 years ago
- Post-Quantum Cryptography IP Core (Crystals-Dilithium)☆23Updated last week
- Implementation of the Advanced Encryption Standard in Chisel☆20Updated 3 years ago
- ☆18Updated 10 months ago
- HW Design Collateral for Caliptra RoT IP☆89Updated this week
- Development Package for the Hardware API for Lightweight Cryptography☆16Updated last month
- AutoSVA is a tool to automatically generate formal testbenches for unit-level RTL verification. The goal is to, based on annotations made…☆81Updated last year
- ☆12Updated 4 years ago
- This repository is compilation of basics of System Verilog Assertions in context of formal verification☆20Updated 6 years ago
- Verilog Hardware Design of Ascon☆22Updated last week
- VexRiscv reference platforms for the pqriscv project☆16Updated last year
- Hardware implementation of polynomial multiplication operation of CRYSTALS-KYBER PQC scheme☆33Updated 3 years ago
- A concolic testing engine for RISC-V embedded software with support for SystemC peripherals☆23Updated last year