momalab / CoPHEELinks
CoPHEE is a Co-processor for Partially Homomorphic Encrypted Encryption.
☆33Updated last year
Alternatives and similar repositories for CoPHEE
Users that are interested in CoPHEE are comparing it to the libraries listed below
Sorting:
- Implementation of Number-theoretic transform(NTT) algorithm on FPGA; 快速数论变换(NTT)的FPGA实现,基为2,有两个并行的蝶形单元☆19Updated 3 years ago
- ☆13Updated 10 years ago
- Verilog RTL Implementation of DNN☆10Updated 7 years ago
- ☆26Updated 2 years ago
- corundum work on vu13p☆19Updated last year
- ☆80Updated last year
- CNN accelerator☆27Updated 8 years ago
- ☆27Updated 5 years ago
- ☆18Updated last month
- PAAS: A System Level Simulator for Heterogeneous (CPU-FPGA) Computing Systems☆43Updated 4 years ago
- TensorCore Vector Processor for Deep Learning - Google Summer of Code Project☆22Updated 4 years ago
- Alveo Versal Example Design☆46Updated 3 weeks ago
- ☆26Updated 3 weeks ago
- CGRA framework with vectorization support.☆35Updated last week
- Dadda multiplier(8*8, 16*16, 32*32) in Verilog HDL.☆34Updated last year
- ☆14Updated 2 years ago
- Implementation of cryptographic algorithm with verilog hdl(such as des,aes,sha,rsa,ecc etc.)☆39Updated 5 years ago
- MEEP FPGA Shell project, currently supporting Alveos u280 and u55c☆14Updated last year
- Circuit-level model for the Capacity-Latency Reconfigurable DRAM (CLR-DRAM) architecture. This repository contains the SPICE models of th…☆14Updated 4 years ago
- Virtualized Accelerator Orchestration for Multi-Tenant Workloads☆18Updated 10 months ago
- vector multiplication adder accelerator (using chisel 3 and RocketChip RoCC ) 向量乘法累加加速器☆54Updated 5 years ago
- Network-on-Chip simulator (Booksim) with hooks for co-simulating RTL designs in Verilog.☆21Updated 9 years ago
- ☆34Updated 5 months ago
- FleetRec: Large-Scale Recommendation Inference on Hybrid GPU-FPGA Clusters☆17Updated 4 years ago
- RISC-V instruction set extensions for SM4 block cipher☆20Updated 5 years ago
- [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers☆31Updated 3 years ago
- Spike with a coherence supported cache model☆13Updated last year
- NPUsim: Full-Model, Cycle-Level, and Value-Aware Simulator for DNN Accelerators☆41Updated 8 months ago
- DASS HLS Compiler☆29Updated last year
- PiDRAM is the first flexible end-to-end framework that enables system integration studies and evaluation of real Processing-using-Memory …☆69Updated last year