momalab / CoPHEE

Related projects ⓘ

Alternatives and complementary repositories for CoPHEE

• XBQ314 / A-Number-Theoretic-Transform-Accelerator-with-Two-Parallel-Simplified-Butterfly-Units
  Implementation of Number-theoretic transform(NTT) algorithm on FPGA; 快速数论变换(NTT)的FPGA实现，基为2，有两个并行的蝶形单元
  ☆14Updated 2 years ago
• flokrieger / Aloha-HE
  ☆14Updated 2 months ago
• secworks / sha3
  FIPS 202 compliant SHA-3 core in Verilog
  ☆18Updated 4 years ago
• fatestudio / RSA4096_NEW
  ☆12Updated 9 years ago
• kgpai94 / ECC-Encryption-System
  This is a Verilog algorithm which takes 8bits and encrypts the data for the purpose of secure communication based on the concept of Ellip…
  ☆29Updated 6 years ago
• p4r4xor / Montgomery1024
  Verilog implementation of 1024 bit Hybrid Montgomery Multiplication/Exponentiation
  ☆10Updated 4 years ago
• pq-crypto / vpqc
  processor for post-quantum cryptography
  ☆14Updated 4 years ago
• aneeshkandi14 / ascon-hw-public
  ☆16Updated 4 months ago
• mjosaarinen / lwaes_isa
  [HISTORICAL] A Lightweight (RISC-V) ISA Extension for AES and SM4
  ☆34Updated 3 years ago
• xiang-rc / cfntt_ref
  ☆24Updated 3 months ago
• raymondrc / riscv-isa-extension-for-SM4
  RISC-V instruction set extensions for SM4 block cipher
  ☆18Updated 4 years ago
• natu4u / GSOC_TensorCore
  TensorCore Vector Processor for Deep Learning - Google Summer of Code Project
  ☆21Updated 3 years ago
• shiva-t / Elliptical-Curve-Cryptography-FPGA
  Implementation of ECC on FPGA-Zynq7000 SoC
  ☆17Updated 5 years ago
• ucb-art / fft
  ☆20Updated 4 years ago
• eriksargent / PUF-lab
  FPGA implementation of a physical unclonable function for authentication
  ☆32Updated 7 years ago
• lajanugen / Modular-Exponentiation
  Verilog Implementation of modular exponentiation using Montgomery multiplication
  ☆32Updated 10 years ago
• mupq / pqriscv-vexriscv
  VexRiscv reference platforms for the pqriscv project
  ☆15Updated 8 months ago
• KULeuven-COSIC / NTRU_NTT_HW
  ☆16Updated 3 years ago
• IamFlea / AdderCircuitGenerator
  This script generates and analyzes prefix tree adders.
  ☆36Updated 3 years ago
• ic-lab-duth / NoCpad
  HLS for Networks-on-Chip
  ☆31Updated 3 years ago
• ucb-bar / sha3
  ☆76Updated 8 months ago
• IAIK / coco-alma
  CocoAlma is an execution-aware tool for formal verification of masked implementations
  ☆21Updated last month
• LoganBrist / C-Verilog_NTT_RNS_Polymultiplier
  ☆23Updated 4 years ago
• DHLSan / FastHomNAND
  Acceleration of TFHE-based Homomorphic NAND Gate on FPGA
  ☆14Updated 3 years ago
• nqHITSZ / Systolic-Array
  course design
  ☆21Updated 6 years ago
• msyksphinz-self / riscv-vector-tests
  Original test vector of RISC-V Vector Extension
  ☆11Updated 3 years ago
• hyperpicc / ecc
  Verilog HDL implementation of Elliptic Curve Cryptography (ECC) over GF(2^163)
  ☆17Updated 7 years ago
• KULeuven-COSIC / HEAT
  Repo for code developed during the HEAT project (Homomorphic Encryption Applications Technology)
  ☆55Updated 4 years ago
• alibaba-damo-academy / damo_ctl_cham
  ☆20Updated last year
• crypt-xie / XCryptCore
  Implementation of cryptographic algorithm with verilog hdl(such as des,aes,sha,rsa,ecc etc.)
  ☆35Updated 4 years ago