Alternatives and similar repositories for riscv-vector

Users that are interested in riscv-vector are comparing it to the libraries listed below

• ucb-bar / constellation
  A Chisel RTL generator for network-on-chip interconnects
  ☆198Updated 3 weeks ago
• ucb-bar / saturn-vectors
  Chisel RISC-V Vector 1.0 Implementation
  ☆98Updated 3 weeks ago
• ucb-bar / hwacha
  Microarchitecture implementation of the decoupled vector-fetch accelerator
  ☆154Updated last year
• chipsalliance / riscv-vector-tests
  Unit tests generator for RVV 1.0
  ☆85Updated 3 weeks ago
• XUANTIE-RV / riscv-matrix-extension-spec
  A matrix extension proposal for AI applications under RISC-V architecture
  ☆148Updated 3 months ago
• tenstorrent / riscv-ocelot
  Ocelot: The Berkeley Out-of-Order Machine With V-EXT support
  ☆165Updated 4 months ago
• pulp-platform / spatz
  Spatz is a compact RISC-V-based vector processor meant for high-performance, small computing clusters.
  ☆108Updated last week
• ucb-bar / chiseltest
  The batteries-included testing and formal verification library for Chisel-based RTL designs.
  ☆231Updated 9 months ago
• pulp-platform / snitch_cluster
  An energy-efficient RISC-V floating-point compute cluster.
  ☆84Updated this week
• pulp-platform / iDMA
  A modular, parametrizable, and highly flexible Data Movement Accelerator (DMA)
  ☆160Updated this week
• bespoke-silicon-group / bsg_manycore
  Tile based architecture designed for computing efficiency, scalability and generality
  ☆257Updated 2 weeks ago
• sparcians / map
  Modeling Architectural Platform
  ☆190Updated this week
• ic-lab-duth / RISC-V-Vector
  Vector processor for RISC-V vector ISA
  ☆119Updated 4 years ago
• pulp-platform / hero
  Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…
  ☆105Updated last year
• OpenXiangShan / HuanCun
  Open-source high-performance non-blocking cache
  ☆82Updated last week
• chiselverify / chiselverify
  A dynamic verification library for Chisel.
  ☆151Updated 6 months ago
• freechipsproject / chisel-testers
  Provides various testers for chisel users
  ☆100Updated 2 years ago
• pulp-platform / FlooNoC
  A Fast, Low-Overhead On-chip Network
  ☆207Updated this week
• riscv / riscv-p-spec
  RISC-V Packed SIMD Extension
  ☆146Updated last year
• ucb-ucie / uciedigital
  Pure digital components of a UCIe controller
  ☆63Updated this week
• ucb-bar / berkeley-hardfloat
  ☆326Updated 8 months ago
• camel-cdr / rvv-bench
  A collection of RISC-V Vector (RVV) benchmarks to help developers write portably performant RVV code
  ☆115Updated last month
• tenstorrent / riscv_arch_tests
  Self checking RISC-V directed tests
  ☆108Updated 3 weeks ago
• plctlab / plct-gem5
  upstream: https://github.com/RALC88/gem5
  ☆31Updated 2 years ago
• ucb-bar / riscv-torture
  RISC-V Torture Test
  ☆195Updated 10 months ago
• ucb-bar / dsptools
  A Library of Chisel3 Tools for Digital Signal Processing
  ☆236Updated last year
• chipsalliance / dromajo
  RISC-V RV64GC emulator designed for RTL co-simulation
  ☆229Updated 6 months ago
• carlosedp / chiselv
  A RISC-V Core (RV32I) written in Chisel HDL
  ☆102Updated 2 months ago
• agile-hw / lectures
  Lectures for the Agile Hardware Design course in Jupyter Notebooks
  ☆94Updated 2 weeks ago
• chipsalliance / playground
  chipyard in mill :P
  ☆78Updated last year