riscv-non-isa / riscv-ras-eriLinks
The (RAS Error-record Register Interface) RERI provides a specification to augment RAS features in RISC-V SOC hardware to standardize reporting and logging of errors by means of a memory-mapped register interface to enable error detection, provide the facility to log the detected errors (including their severity, nature, and location), and confi…
☆10Updated 3 weeks ago
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