The repo holds the draft non-ISA Server SoC specification being developed by the Server SoC specification TG and to release intermediate releases of the specification on milestones. Further downstream this repo will be used to release specifications for public review.
☆34May 22, 2026Updated last week
Alternatives and similar repositories for riscv-server-soc
Users that are interested in riscv-server-soc are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- The RISC-V Server Platform specification defines a standardized set of hardware and sofware capabilities, that portable system software, …☆30May 18, 2026Updated last week
- RISC-V IOMMU Specification☆162May 13, 2026Updated 2 weeks ago
- RISC-V Security Model☆35May 20, 2026Updated last week
- SOPHGO RISC-V Zero Stage BootLoader☆31Apr 7, 2026Updated last month
- This repo holds the work area and revisions of the non-ISA specification created by the RISC-V AP-TEE TG. This specification defines the …☆69Mar 7, 2026Updated 2 months ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- Parallel_Computer_Architecture经典书籍☆17May 13, 2022Updated 4 years ago
- RISC-V IOMMU Demo (Linux & Bao)☆24Dec 5, 2023Updated 2 years ago
- Bugs Everywhere (BE), a bugtracker built on distributed version control.☆17Nov 17, 2016Updated 9 years ago
- AWS Shell for FireSim☆13Nov 13, 2024Updated last year
- The RAS Error-record Register Interface provides a specification to augment RAS features in RISC-V SOC hardware to standardize reporting …☆11May 1, 2026Updated 3 weeks ago
- Memory Tagging ISA extension that can be used by software to enforce memory tag checks on memory loads and stores☆35May 20, 2026Updated last week
- IOMMU IP compliant with the RISC-V IOMMU Specification v1.0☆119Sep 24, 2025Updated 8 months ago
- ☆101Apr 18, 2026Updated last month
- AIA IP compliant with the RISC-V AIA spec☆46Jan 27, 2025Updated last year
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Proposal for a RISC-V Core-Local Interrupt Controller (CLIC)☆295May 22, 2026Updated last week
- example using the httpapi connection plugin☆11Sep 19, 2018Updated 7 years ago
- A lightweight Ethernet MAC Controller IP for FPGA prototyping☆14Oct 19, 2020Updated 5 years ago
- Base on Synopsys platform using VCS,DC,ICC,PT.☆11May 29, 2021Updated 5 years ago
- This github repository summarizes relevant papers for shift left techniques in electronic design automation (EDA).☆32Sep 19, 2025Updated 8 months ago
- FORTH in Zig☆19May 8, 2026Updated 3 weeks ago
- Linux for Powerpc mirror☆27May 20, 2026Updated last week
- Linux kernel source tree☆14Jun 25, 2025Updated 11 months ago
- WASI Preview 1 implementation for moonbit☆13May 22, 2026Updated last week
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- enchmarking Large Language Models' Resistance to Malicious Code☆17Apr 23, 2026Updated last month
- Markup and print strings to the terminal☆12Apr 28, 2026Updated last month
- Fast UTF-8 codepoint sets for Zig.☆11May 4, 2026Updated 3 weeks ago
- Utility functions to get field values from the abstract syntax tree generated from ZON (Zig Object Notation) text using Zig stdlib☆13Feb 5, 2025Updated last year
- nyar 是一个用 Rust 编写的任务管理程序，它可以让您在后台运行和管理各种任务，例如定时任务，启动任务，重启任务等。☆14May 19, 2026Updated last week
- ☆32Apr 8, 2026Updated last month
- RISC-V Nexus Trace TG documentation and reference code☆61Apr 8, 2026Updated last month
- Cirros is a minimal vm for OpenStack here forked from lp:cirros☆18Jun 17, 2014Updated 11 years ago
- Tutorial Material from the SST Team☆26Aug 5, 2025Updated 9 months ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- A simple, generic text rendering system in Zig, based on FreeType and HarfBuzz.☆14Sep 14, 2024Updated last year
- Lispy interpreter for Zig☆12Sep 13, 2024Updated last year
- A GUI pretending to be a DE1 for visualizing Verilog sims☆10Oct 17, 2020Updated 5 years ago
- Some basic unsigned 128 bit math and bitwise operations implemented in go☆18Dec 27, 2014Updated 11 years ago
- ☆18Dec 18, 2019Updated 6 years ago
- Verilog Ethernet components for FPGA implementation☆25Jun 26, 2023Updated 2 years ago
- S2E Core Engine Library☆15Jan 7, 2020Updated 6 years ago