Polyphony is Python based High-Level Synthesis compiler.
☆110Apr 14, 2026Updated last month
Alternatives and similar repositories for polyphony
Users that are interested in polyphony are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆54Jul 25, 2024Updated last year
- Intermediate Representation Of Hardware Abstraction (LLVM-ish for HLS)☆38Jul 9, 2021Updated 4 years ago
- Python-based Portable IP-core Synthesis Framework for FPGA-based Computing☆53Nov 21, 2016Updated 9 years ago
- The Shang high-level synthesis framework☆120May 29, 2014Updated 11 years ago
- Karuta HLS Compiler: High level synthesis from prototype based object oriented script language to RTL (Verilog) aiming to be useful for F…☆110Jan 29, 2022Updated 4 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Veriloggen: A Mixed-Paradigm Hardware Construction Framework☆325Mar 8, 2026Updated 2 months ago
- This repository is no longer maintained. New repository is here(https://github.com/rggen/rggen).☆18Aug 1, 2019Updated 6 years ago
- IP-core package generator for AXI4/Avalon☆23Nov 25, 2018Updated 7 years ago
- ☆24Nov 10, 2020Updated 5 years ago
- Hot & Spicy tool suite☆23Jan 4, 2022Updated 4 years ago
- HOG + SVM on FPGA☆28Dec 16, 2020Updated 5 years ago
- a free, portable, minimalist, work-in-progress RTPS implementation☆12Nov 1, 2017Updated 8 years ago
- NNgen: A Fully-Customizable Hardware Synthesis Compiler for Deep Neural Network☆365Oct 17, 2023Updated 2 years ago
- mantle library☆44Dec 20, 2022Updated 3 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- ☆13Jun 12, 2018Updated 7 years ago
- ☆13Dec 22, 2024Updated last year
- A collection of tools for working with Chisel-generated hardware in SystemC☆16Jul 23, 2019Updated 6 years ago
- Combination of Analog Circuit Sizing and DL.☆18Mar 24, 2023Updated 3 years ago
- An open source high level synthesis (HLS) tool built on top of LLVM☆130Jun 11, 2024Updated last year
- VHDL/Verilog/SystemC code generator, simulator API written in python/c++☆225May 13, 2026Updated last week
- A collection of URLs related to High Level Synthesis (HLS).☆13Jun 26, 2021Updated 4 years ago
- Open-source Software Platform Based on TOPPERS/ASP Kernel, mbed and Arduino Library for Renesas GR-PEACH.☆12Mar 25, 2020Updated 6 years ago
- Original FPGA platform☆75Updated this week
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- 586 compatible soft core for FPGA in verilog with AXI4 interface☆15Oct 15, 2016Updated 9 years ago
- Updated Xilinx PYNQ for Zynq + ZynqMP python HW acceleration development☆12Mar 16, 2018Updated 8 years ago
- TOPPERSユーザーズフォーラム :ユーザのためのQ&Aおよび情報交換の場☆12Jun 16, 2022Updated 3 years ago
- ☆10Jan 15, 2023Updated 3 years ago
- 株式会社Cerevo 「MKZ4」向けのArduinoソースコード等を集約したリポジトリ☆13Aug 17, 2022Updated 3 years ago
- LLVM based HLS library for HWToolkit (hardware devel. toolkit)☆29May 13, 2026Updated last week
- ESI is an FPGA connectivity system. It uses typed, latency-insensitive on-chip connections between ESI-enabled modules. It also bridges o…☆35Sep 30, 2020Updated 5 years ago
- ☆236Mar 20, 2023Updated 3 years ago
- OpenReroc (Open source Reconfigurable robot component)☆10Oct 17, 2016Updated 9 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Hardware Description Library☆93Feb 17, 2026Updated 3 months ago
- Open-source CSI-2 receiver for Xilinx UltraScale parts☆37Jul 10, 2019Updated 6 years ago
- HWASim is a simulator for heterogeneous systems with CPUs and Hardware Accelerators (HWAs). It is released with the DASH memory scheduler…☆19Jan 11, 2016Updated 10 years ago
- GUINNESS: A GUI-based binarized deep Neural NEtwork SyntheSizer toward an FPGA☆181Jul 20, 2019Updated 6 years ago
- Accelerating a Classic 3D Video Game (The DOOM) on Heterogeneous Reconfigurable MPSoCs☆20Jun 4, 2020Updated 5 years ago
- ☆10Jun 10, 2025Updated 11 months ago
- A Vivado HLS Command Line Helper Tool☆36Oct 6, 2021Updated 4 years ago