meton-robean / CFG_DFG_generatorLinks
generating DFG and CFG from source code (using LLVM ) or from binary (using LLVM and Mcsema) 二进制或者源码转CGF& DFG
☆42Updated 5 years ago
Alternatives and similar repositories for CFG_DFG_generator
Users that are interested in CFG_DFG_generator are comparing it to the libraries listed below
Sorting:
- Simple passes for CFG and DFG analysis☆44Updated 6 years ago
- ☆93Updated last year
- ☆86Updated 2 years ago
- A blog for LLVM(v9.0.0 or v11.0.0) beginner, step by step, with detailed documents and comments. Record the way I learn LLVM and accompli…☆104Updated 3 years ago
- llvm Data Flow Graph dump☆38Updated 4 years ago
- An LLVM pass to profile dynamic LLVM IR instructions and runtime values☆140Updated 4 years ago
- GPU-enabled Hardware Fuzzer using Genetic Algorithm☆17Updated 2 years ago
- Security Test Benchmark for Computer Architectures☆21Updated 6 months ago
- rfuzz: coverage-directed fuzzing for RTL research platform☆108Updated 3 years ago
- This repository contains the hardware, software, and OS support for the Programmable Hardware Monitor (PHMon).☆26Updated 5 years ago
- Artifact evaluation of paper: MorFuzz: Fuzzing Processor via Runtime Instruction Morphing enhanced Synchronizable Co-simulation☆30Updated 4 months ago
- Project Repo for the Simulator Independent Coverage Research☆20Updated 2 years ago
- A behavioural cache model for analysing the cache behaviour under side-channel attack.☆26Updated last month
- FLOWMATRIX: GPU-Assisted Information-Flow Analysis through Matrix-Based Representation, USENIX Security'22☆28Updated 2 years ago
- ☆38Updated last year
- ☆25Updated 2 years ago
- ☆12Updated last year
- A group of students who are interested in Compilers, and they want to improve themselves together.☆26Updated 3 years ago
- A port of the RIPE suite to RISC-V.☆29Updated 6 years ago
- Gem5 implementation of "InvisiSpec", a defense mechanism of speculative execution attacks on cache hierarchy.☆60Updated 5 years ago
- ☆16Updated 4 years ago
- Proof-of-concept implementation for the paper "A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs" (IEEE S&P 2023)☆69Updated 5 months ago
- Code repository for Coppelia tool☆23Updated 4 years ago
- All the tools you need to reproduce the CellIFT paper experiments☆21Updated 6 months ago
- Dynamic ControlFlow Graph and DataFlow Graph for Binary-based Optimization☆21Updated 8 years ago
- Hardware Formal Verification Tool☆62Updated last week
- ☆35Updated 2 years ago
- The MiBench testsuite, extended for use in general embedded environments☆101Updated 12 years ago
- A Modular Open-Source Hardware Fuzzing Framework☆34Updated 3 years ago
- Automated Repair of Verilog Hardware Descriptions☆32Updated 7 months ago