🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.
☆33Aug 20, 2022Updated 4 years ago
Alternatives and similar repositories for fpga_torture
Users that are interested in fpga_torture are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ZX80/81 implementation for the Ulx3s☆13May 4, 2022Updated 4 years ago
- ☆11Aug 29, 2026Updated 3 weeks ago
- Proposal to define an XML-based logging format for outputs from EDA tools and logging libraries.☆14Sep 7, 2026Updated 2 weeks ago
- a project to check the FOSS synthesizers against vendors EDA tools☆12Sep 26, 2020Updated 6 years ago
- VHDL String Formatting Library☆27Apr 27, 2024Updated 2 years ago
- GPUs on demand by Runpod - Special Offer Available • AdRun AI, ML, and HPC workloads on powerful cloud GPUs—without limits or wasted spend. Deploy GPUs in under a minute and pay by the second.
- Example of Test Driven Design with VUnit☆16Nov 22, 2021Updated 4 years ago
- Library of reusable VHDL components☆28Mar 7, 2024Updated 2 years ago
- VHDL package to provide C-like string formatting☆15May 6, 2022Updated 4 years ago
- Interfacing VHDL and foreign languages with VUnit☆15Feb 20, 2020Updated 6 years ago
- An open-source VHDL library for FPGA design.☆32Jun 2, 2022Updated 4 years ago
- Examples of using PSL for functional and formal verification of VHDL with GHDL (and SymbiYosys)☆70Feb 16, 2026Updated 7 months ago
- Examples and design pattern for VHDL verification☆15Apr 10, 2016Updated 10 years ago
- A translation of the Xilinx XPM library to VHDL for simulation purposes☆71Jul 29, 2026Updated last month
- VHDL related news.☆27Updated this week
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- This is an example of how TerosHDL can generate your documentation project from the command line. So you can integrate it in your CI work…☆10Jan 13, 2022Updated 4 years ago
- Start here. Includes all other OSVVM libraries as submodules: Utility, Common, Verification Component, and Script.☆88Sep 16, 2026Updated last week
- Tests to evaluate the support of VHDL 2008 and VHDL 2019 features☆32Jan 30, 2025Updated last year
- A usable language reference for VHDL that is concise, direct, and easy to understand.☆26Jun 23, 2026Updated 3 months ago
- TI-99/4A FPGA implementation for the Icestorm toolchain☆22Nov 29, 2025Updated 9 months ago
- A bit-serial CPU☆20Sep 29, 2019Updated 6 years ago
- Constraint files for Hardware Description Language (HDL) designs targeting FPGA boards☆49Feb 12, 2026Updated 7 months ago
- Standard and Curated cores, tested and working.☆11Dec 29, 2022Updated 3 years ago
- Specification of the Wishbone SoC Interconnect Architecture☆54Jun 5, 2022Updated 4 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Trying to verify Verilog/VHDL designs with formal methods and tools☆44Mar 7, 2024Updated 2 years ago
- ☆14Aug 25, 2019Updated 7 years ago
- VHDLproc is a VHDL preprocessor☆24May 12, 2022Updated 4 years ago
- VHDL dependency analyzer☆25Mar 10, 2020Updated 6 years ago
- Use XML files to describe register maps; auto-generate C, VHDL, Python, and HTML.☆14Sep 22, 2025Updated last year
- Experiments with Cologne Chip's GateMate FPGA architecture☆19Nov 16, 2023Updated 2 years ago
- SNES for MiSTer☆16Sep 5, 2025Updated last year
- KiCad RF Stuff☆14Aug 17, 2021Updated 5 years ago
- CLI tool for RTL design space exploration on top of Vivado☆15Jun 5, 2023Updated 3 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Rust proof-of-concept for GPU waveform rendering☆13Jul 22, 2020Updated 6 years ago
- Documenting Lattice's 28nm FPGA parts☆154Jul 19, 2026Updated 2 months ago
- Fixed-point math library with VHDL, Python and MATLAB support☆39Aug 12, 2026Updated last month
- CologneChip GateMate FPGA Module: GMM-7550☆36Jan 17, 2026Updated 8 months ago
- ☆12Jun 4, 2021Updated 5 years ago
- JavaScript action for users to easily install tip/nightly GHDL assets in GitHub Actions workflows☆16Jan 12, 2025Updated last year
- nMigen examples for the ULX3S board☆16Nov 30, 2020Updated 5 years ago