nvdla / nvdla.github.io
NVDLA Web Content
☆42Updated 3 months ago
Related projects ⓘ
Alternatives and complementary repositories for nvdla.github.io
- Documentation for NVDLA.☆236Updated 3 months ago
- A discussion group on Open Source Deep Learning Accelerator, with technical reports and potential hardware/software issues.☆138Updated 6 years ago
- Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel☆208Updated 4 years ago
- FireSim-NVDLA: NVIDIA Deep Learning Accelerator (NVDLA) Integrated with RISC-V Rocket Chip SoC Running on the Amazon FPGA Cloud☆161Updated 2 years ago
- Virtual Platform for NVDLA☆139Updated 6 years ago
- Chisel implementation of the NVIDIA Deep Learning Accelerator (NVDLA), with self-driving accelerated☆221Updated last month
- ☆108Updated 6 years ago
- ☆84Updated last year
- ☆119Updated 6 years ago
- Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.☆207Updated 5 years ago
- Microarchitecture implementation of the decoupled vector-fetch accelerator☆146Updated 9 months ago
- NVDLA is an Open source DL/ML accelerator, which is very suitable for individuals or college students. This is the NOTES when I learn and…☆221Updated 5 years ago
- Getting Started with Xilinx ML Suite☆335Updated 3 years ago
- ☆82Updated 4 years ago
- HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs☆323Updated 5 years ago
- AI articles of the week☆64Updated 6 years ago
- SDAccel Examples☆355Updated 2 years ago
- SystemC/C++ library of commonly-used hardware functions and components for HLS.☆260Updated last week
- Common RTL blocks used in SiFive's projects☆179Updated 2 years ago
- Provides dot visualizations of chisel/firrtl circuits☆115Updated last year
- Template for projects using the Hwacha data-parallel accelerator☆34Updated 3 years ago
- Binarized Convolutional Neural Networks on Software-Programmable FPGAs☆302Updated 3 years ago
- ☆131Updated 2 years ago
- FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.☆172Updated 7 years ago
- A discussion group on Open Source Deep Learning Accelerator, with technical reports and potential hardware/software issues.☆15Updated 6 years ago
- Support for Rocket Chip on Zynq FPGAs☆39Updated 5 years ago
- A Library of Chisel3 Tools for Digital Signal Processing☆225Updated 6 months ago
- Deep Learning Accelerator Based on Eyeriss V2 Architecture with custom RISC-V extended instructions☆175Updated 4 years ago
- FPGA implementation of Cellular Neural Network (CNN)☆136Updated 6 years ago
- ☆23Updated 6 years ago