Alternatives and similar repositories for NN2FPGA

Users that are interested in NN2FPGA are comparing it to the libraries listed below

• jeshraghian / snn-accelerator
  ☆30Updated 3 years ago
• ChFrenkel / tinyODIN
  tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.
  ☆75Updated 2 years ago
• snagiri / CSE237D-PYNQ-SNN-Accelerator
  Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board
  ☆38Updated 6 years ago
• Deepak42074 / SRAM_IMC_MPW8
  The project includes SRAM In Memory Computing Accelerator with updates in design/circuits submitted previously in MPW7, by IITD researche…
  ☆16Updated 2 years ago
• ChFrenkel / ReckOn
  ReckOn: A Spiking RNN Processor Enabling On-Chip Learning over Second-Long Timescales - HDL source code and documentation.
  ☆91Updated 3 years ago
• SFU-HiAccel / SyncNN
  [FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.
  ☆63Updated 4 years ago
• VincentWang1998 / ai_on_chip_project1
  tpu-systolic-array-weight-stationary
  ☆25Updated 4 years ago
• saunak1994 / CyNAPSEv11
  The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL
  ☆36Updated 6 years ago
• pulp-platform / sne
  ☆20Updated 3 years ago
• AlexMontgomerie / fpgaconvnet-tutorial
  A collection of tutorials for the fpgaConvNet framework.
  ☆47Updated last year
• Spiritator / FPGA_LeNet5_ws_8x8
  FPGA implement of 8x8 weight stationary systolic array DNN accelerator
  ☆16Updated 4 years ago
• UA-RCL / RANC
  ☆53Updated last year
• yucanliu / VLSI_SNN
  A Spiking Neuron Network Project in Verilog Implementation
  ☆25Updated 7 years ago
• gnodipac886 / ViT-FPGA-TPU
  FPGA based Vision Transformer accelerator (Harvard CS205)
  ☆139Updated 10 months ago
• KastnerRG / cgra4ml
  An Open Workflow to Build Custom SoCs and run Deep Models at the Edge
  ☆100Updated this week
• Fiwo735 / Transformer_Neural_Network_HLS
  ☆14Updated 3 years ago
• maomran / softmax
  Verilog implementation of Softmax function
  ☆78Updated 3 years ago
• hguq / HG-PIPE
  FPGA-based hardware accelerator for Vision Transformer (ViT), with Hybrid-Grained Pipeline.
  ☆108Updated 10 months ago
• arkhodamoradi / s2n2
  ☆17Updated 4 years ago
• zwhexplorer / Spiking-Neural-Network-Accelerator-EE552-project
  Spiking Neural Network Accelerator
  ☆15Updated 3 years ago
• debtanu09 / systolic_array_matrix_multiplier
  This is a verilog implementation of 4x4 systolic array multiplier
  ☆70Updated 5 years ago
• 8krisv / CNN-ACCELERATOR
  Hardware accelerator for convolutional neural networks
  ☆60Updated 3 years ago
• sfmth / OpenSpike
  Fully opensource spiking neural network accelerator
  ☆162Updated 2 years ago
• Xilinx / logicnets
  Train and deploy LUT-based neural networks on FPGAs
  ☆105Updated last year
• neurosim / DNN_NeuroSim_V1.4
  Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)
  ☆74Updated 9 months ago
• CASR-HKU / MSD-FCCM23
  Open-source of MSD framework
  ☆16Updated 2 years ago
• FedericoSerafini / HLS-CNN
  High Level Synthesis of a trained Convolutional Neural Network for handwritten digit recongnition.
  ☆41Updated last year
• suchuankai / CNN-hw-accelerator
  CNN hardware accelerator to accelerate quantized LeNet-5 model
  ☆41Updated 2 years ago
• nikitabuzov / SpikingNeuralNet
  Spiking neural network implementation using Verilog with LIF (Leaky Integrate-and-Fire) neurons
  ☆19Updated 5 years ago
• neurosim / DNN_NeuroSim_V2.0
  Benchmark framework of compute-in-memory based accelerators for deep neural network (on-chip training chip focused)
  ☆53Updated 4 years ago