Alternatives and similar repositories for pynq_api

Users that are interested in pynq_api are comparing it to the libraries listed below

• cathalmccabe / PYNQ_tutorials
  ☆100Updated 2 years ago
• Xilinx / xup_high_level_synthesis_design_flow
  AMD University Program HLS tutorial
  ☆120Updated last year
• Xilinx / DPU-PYNQ
  DPU on PYNQ
  ☆234Updated 3 months ago
• Xilinx / finn-examples
  Dataflow QNN inference accelerator examples on FPGAs
  ☆239Updated 3 months ago
• amiq-consulting / CNN-using-HLS
  Convolutional Neural Network Using High Level Synthesis
  ☆90Updated 5 years ago
• KastnerRG / cgra4ml
  An Open Workflow to Build Custom SoCs and run Deep Models at the Edge
  ☆97Updated this week
• mflowgen / freepdk-45nm
  ASIC Design Kit for FreePDK45 + Nangate for use with mflowgen
  ☆192Updated 5 years ago
• UCLA-VAST / tapa
  TAPA compiles task-parallel HLS program into high-performance FPGA accelerators. UCLA-maintained.
  ☆176Updated 3 months ago
• Xilinx / finn-hlslib
  Vitis HLS Library for FINN
  ☆210Updated 2 months ago
• spcl / gemm_hls
  Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.
  ☆372Updated 10 months ago
• xupgit / Advanced-Embedded-System-Design-Flow-on-Zynq
  ☆54Updated 6 years ago
• mflowgen / mflowgen
  mflowgen -- A Modular ASIC/FPGA Flow Generator
  ☆275Updated 2 weeks ago
• manoharvhr / PYNQ-Torch
  PYNQ-Torch: a framework to develop PyTorch accelerators on the PYNQ platform
  ☆72Updated 5 years ago
• xupgit / Zynq-Design-using-Vivado
  This XUP course provides an introduction to embedded system design on Zynq using the Xilinx Vivado software suite.
  ☆85Updated 2 years ago
• Xilinx / PYNQ-HelloWorld
  This repository contains a "Hello World" introduction application to the Xilinx PYNQ framework.
  ☆108Updated 3 years ago
• dpretet / axi-crossbar
  An AXI4 crossbar implementation in SystemVerilog
  ☆193Updated 3 months ago
• drichmond / RISC-V-On-PYNQ
  RISC-V Integration for PYNQ
  ☆179Updated 6 years ago
• Xilinx / Vivado-Design-Tutorials
  ☆237Updated 4 months ago
• erihsu / INT_FP_MAC
  INT8 & FP16 multiplier accumulator (MAC) design with UVM verification completed.
  ☆109Updated 5 years ago
• nishthaparashar / Floating-Point-ALU-in-Verilog
  32-Bit Algorithms of Floating Point Operations are implemented on Verilog with logic Operations.
  ☆97Updated 6 years ago
• danshanley / FPU
  IEEE 754 floating point unit in Verilog
  ☆150Updated 9 years ago
• xupgit / FPGA-Design-Flow-using-Vivado
  This course gives an introduction to digital design tool flow in Xilinx programmable devices using Vivado® Design software suite
  ☆103Updated 6 years ago
• debtanu09 / systolic_array_matrix_multiplier
  This is a verilog implementation of 4x4 systolic array multiplier
  ☆70Updated 5 years ago
• thedatabusdotio / fpga-ml-accelerator
  This repository hosts the code for an FPGA based accelerator for convolutional neural networks
  ☆171Updated last year
• Xilinx / XilinxBoardStore
  ☆306Updated 2 weeks ago
• leo47007 / TPU-Tensor-Processing-Unit
  IC implementation of TPU
  ☆140Updated 5 years ago
• The-OpenROAD-Project / asap7
  ☆216Updated 8 months ago
• suoglu / Fixed-Floating-Point-Adder-Multiplier
  16-bit Adder Multiplier hardware on Digilent Basys 3
  ☆82Updated 2 years ago
• definelicht / hlslib
  A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
  ☆332Updated 10 months ago
• pulp-platform / FlooNoC
  A Fast, Low-Overhead On-chip Network
  ☆247Updated last week